Write Sectors (30H/31H); Table 162: Write Sectors Command (30H/31H) - Hitachi HTS542525K9SA00 Specifications

12.54 Write Sectors (30h/31h)

Table 163: Write Sectors command (30h/31h)
Command Block Output Registers
Register
Data
Feature
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Command
Error Register
7 6 5
CRC UNC 0 IDN
0 0 0
The Write Sectors command transfers one or more sectors from the host to the device. The data is then written to
the disk media.
The sectors are transferred through the Data Register 16 bits at a time.
If an uncorrectable error occurs, the write will be terminated at the failing sector.
Output parameters to the device
Sector Count
Sector Number
Cylinder High/Low This indicates the cylinder number of the first sector to be transferred. (L = 0)
H
R
Input parameters from the device
Sector Count
Sector Number
7 6 5 4 3 2 1 0
- - - - - - - -
- - - - - - - -
V V V V V V V V
V V V V V V V V
V V V V V V V V
V V V V V V V V
1 L 1 D H H H H
0 0 1 1 0 0 0 R
4 3 2 1
0 ABT T0N AMN
V 0 V 0
This indicates the number of continuous sectors to be transferred. If zero is specified,
256 sectors will be transferred.
This indicates the sector number of the first sector to be transferred. (L = 0)
In LBA mode this register contains the LBA bits 0–7. (L = 1)
In LBA mode this register contains the LBA bits 8–15 (Low) and bits 16–23 (High)
(L = 1)
This indicates the head number of the first sector to be transferred. (L = 0)
In LBA mode this register contains the LBA bits 24–27. (L = 1)
This indicates the retry bit. this bit is ignored.
This indicates the number of requested sectors not transferred. This will be zero unless an
unrecoverable error occurs.
This indicates the sector number of the last transferred sector. (L = 0)
In LBA mode this register contains the current LBA bits 0–7. (L = 1)
Deskstar 7K160 Hard Disk Drive Specification
Command Block Input Registers
Register
Data
Error
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Status
0 7 6 5
BSY RDY DF DSC DRQ
0 0 V 0
265
7 6 5 4 3 2 1 0
- - - - - - - -
see below
V V V V V V V V
V V V V V V V V
V V V V V V V V
V V V V V V V V
- - - - H H H H
see below
Status Register
4 3 2 1
COR IDX
V - 0 -
0
ERR
V