Hitachi C4K60 - Travelstar Slim - Hard Drive Specifications page 30

Signal name Pin
INTRQ 30
DA0-2 31,33,34
PDIAG-:CBLID- 32
*1
CS0- 35
CS1- 36
DASP- 37
DMARQ 22
DMACK- 29
DEVADR 40
*1: PDIAG-:CBLID- (Passed diagnostics: Cable assembly type identifier
The DEVADR signal level is as follows.
(1) Input signal
The other I/O signal levels are as follows.
(1) Input signal
(2) Output signal
Note
1) The I/F cable should be no longer than 90mm including the circuit pattern length in the host system. If
the cable length is not within this specification, it may cause factional degradations or some errors.
K6610170
Rev.2
Dec 22, 2004
Table 6.2 Signal List(Continued)
I/O type
O This is an interrupt signal for the host system. This signal is
asserted by a selected device when the nIEN bit in the Device
Control Register is "0". In other cases, this signal should be a high
impedance state.
I This is a register address signal from the host system.
I/O The host shall wait until the power on or hardware reset sequence
is complete for all devices on the cable;
I This device chip selection signal is used to select the Command
Block Registers from the host system.
I This device chip selection signal is used to select the Control Block
Registers from the host system.
I/O This signal indicates that a device is active when the power is turned
on.
Upon receipt of a command from the host, the device asserts this
signal. At command completion, the device de-asserts this signal.
O The device shall assert this signal, used for DMA data transfers
between host and device, when it is ready to transfer data.
I The host in response to DMARQ to either acknowledge that data
has been accepted, or that data is available shall use this signal.
I The device is configured as either Device 0 (Master) or Device 1
(Slave) depending upon the signal level of 40 pin DEVADR signal.
- When used as Device 0 (Master),
DEVADR is open
- When used as Device 1 (Slave),
the host shall have pull-up resistor.
Recommended pull-up resistor is 10K ohm based on +3.3Vcc.
+2.0V to
High level
−0.4V to
Low level
+2.0V to
High level
−0.5V to
Low level
+2.4V to +3.46V or an open circuit
High level
+0.4V or less (IOL=2mA), +0.5V or less (IOL=12mA)
Low level
Description
Vcc+0.4V
+0.8V
Vcc+0.5V
+0.8V
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