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Errata (Sheet 2 of 5)
Steppings
Number
E-1
L-1
N-0
BV7
X
X
X
BV8
X
X
X
BV9
X
X
X
BV10
X
X
X
BV11
X
X
X
BV12
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X
BV13
X
X
X
BV14
X
X
X
BV15
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X
BV16
X
X
X
BV17
X
X
X
BV18
X
X
X
BV19
X
X
X
BV20
X
X
X
BV21
X
X
X
BV22
X
X
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BV23
X
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BV24
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BV25
X
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BV26
X
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BV27
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BV28
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BV29
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BV30
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BV31
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BV32
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Specification Update
Status
General Protection Fault (#GP) for Instructions Greater than 15 Bytes May be
No Fix
Preempted
LBR, BTS, BTM May Report a Wrong Address when an Exception/Interrupt Occurs
No Fix
in 64-bit Mode
Incorrect Address Computed For Last Byte of FXSAVE/FXRSTOR or XSAVE/
No Fix
XRSTOR Image Leads to Partial Memory Update
No Fix
Values for LBR/BTS/BTM Will be Incorrect after an Exit from SMM
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
No Fix
Translation Change
No Fix
B0-B3 Bits in DR6 For Non-Enabled Breakpoints May be Incorrectly Set
MCi_Status Overflow Bit May Be Incorrectly Set on a Single Instance of a DTLB
No Fix
Error
Debug Exception Flags DR6.B0-B3 Flags May be Incorrect for Disabled
No Fix
Breakpoints
No Fix
LER MSRs May Be Unreliable
No Fix
Storage of PEBS Record Delayed Following Execution of MOV SS or STI
No Fix
PEBS Record not Updated when in Probe Mode
No Fix
MONITOR or CLFLUSH on the Local XAPIC's Address Space Results in Hang
No Fix
Faulting MMX Instruction May Incorrectly Update x87 FPU Tag Word
An Uncorrectable Error Logged in IA32_CR_MC2_STATUS May also Result in a
No Fix
System Hang
#GP on Segment Selector Descriptor that Straddles Canonical Boundary May Not
No Fix
Provide Correct Exception Error Code
DR6.B0-B3 May Not Report All Breakpoints Matched When a MOV/POP SS is
No Fix
Followed by a Store or an MMX Instruction
No Fix
APIC Error "Received Illegal Vector" May be Lost
Changing the Memory Type for an In-Use Page Translation May Lead to Memory-
No Fix
Ordering Violations
Reported Memory Type May Not Be Used to Access the VMCS and Referenced
No Fix
Data Structures
LBR, BTM or BTS Records May have Incorrect Branch From Information After an
No Fix
EIST/T-state/S-state/C1E Transition or Adaptive Thermal Throttling
Fault Not Reported When Setting Reserved Bits of Intel® VT-d Queued Invalidation
No Fix
Descriptors
FP Data Operand Pointer May Be Incorrectly Calculated After an FP Access Which
No Fix
Wraps a 4-Gbyte Boundary in Code That Uses 32-Bit Address Size in 64-bit Mode
VMREAD/VMWRITE Instruction May Not Fail When Accessing an Unsupported
No Fix
Field in VMCS
No Fix
Spurious Interrupts May be Generated From the Intel® VT-d Remap Engine
Malformed PCIe Transactions May be Treated as Unsupported Requests Instead of
No Fix
as Critical Errors
Reception of Certain Malformed Transactions May Cause PCIe Port to Hang
No Fix
Rather Than Reporting an Error
ERRATA
9
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