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BV92.
The Processor May Not Properly Execute Code Modified Using A Floating-Point
Store
Problem:
Under complex internal conditions, a floating-point store used to modify the next
sequential instruction may result in the old instruction being executed instead of the
new instruction.
Implication:
Self- or cross-modifying code may not execute as expected. Intel has not observed this
erratum with any commercially available software.
Workaround:
None identified. Do not use floating-point stores to modify code.
Status:
For the steppings affected, see the Summary Tables of Changes.
BV93.
Execution of GETSEC[SEXIT] May Cause a Debug Exception to be Lost
Problem:
A debug exception occurring at the same time that GETSEC[SEXIT] is executed or when
an SEXIT doorbell event is serviced may be lost.
Implication:
Due to this erratum, there may be a loss of a debug exception when it happens
concurrently with the execution of GETSEC[SEXIT]. Intel has not observed this erratum
with any commercially available software.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BV94.
VM Exits Due to GETSEC May Save an Incorrect Value for "Blocking by STI" in the
Context of Probe-Mode Redirection
Problem:
The GETSEC instruction causes a VM exit when executed in VMX non-root
operation. Such a VM exit should set bit 0 in the Interruptability-state field in the
virtual-machine control structure (VMCS) if the STI instruction was blocking interrupts
at the time GETSEC commenced execution. Due to this erratum, a VM exit executed in
VMX non-root operation may erroneously clear bit 0 if redirection to probe mode occurs
on the GETSEC instruction.
Implication:
After returning from probe mode, a virtual interrupt may be incorrectly delivered prior
to GETSEC instruction. Intel has not observed this erratum with any commercially
software.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BV95.
Specific Graphics Blitter Instructions May Result in Unpredictable Graphics
Controller Behavior
Problem:
Specific source-copy blitter instructions in Intel® HD Graphics 2500 and 4000
Processor may result in unpredictable behavior when a blit source and destination
overlap.
Implication:
Due to this erratum, the processor may exhibit unpredictable graphics controller
behavior. Intel has not observed this erratum with any commercially available software.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
46
Specification Update
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