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READ_BUS_D8
READ_BUS_D16
READ_BUS_D32
READ_BUS_D64
WRITE_BUS_D8
WRITE_BUS_D16
WRITE_BUS_D32
WRITE_BUS_D64
The following code shows how the if_el driver uses the READ_BUS_D16,
READ_BUS_D32, WRITE_BUS_D16, and WRITE_BUS_D32 kernel routines to
construct driver-specific macros to perform read and write operations on the
3Com 3C5x9 device:
#define READ_CCR(sc)
#define WRITE_CCR(sc, val)
#define READ_ACR(sc)
#define WRITE_ACR(sc, val)
#define WRITE_RCR(sc, val)
#define WRITE_ECR(sc, val)
#define READ_EDR(sc)
#define WRITE_CMD(sc, val)
#define READ_STS(sc)
#define WRITE_DATA(sc, val)
#define READ_DATA(sc)
#define READ_ND(sc)
#define WRITE_ND(sc, val)
#define READ_MD(sc)
#define WRITE_MD(sc, val)
#define READ_TXF(sc)
#define READ_RXF(sc)
#define WRITE_AD1(sc, val)
#define WRITE_AD2(sc, val)
#define WRITE_AD3(sc, val)
#define READ_TXS(sc)
#define WRITE_TXS(sc, val)
#define READ_RXS(sc)
#define READ_FDP(sc)
Constructs driver-specific macros to read from and write to the 3Com
1
3C5x9 device's CSRs.
The first argument to these macros specifies an I/O handle that
references a device register or memory that is located in bus address
space (either I/O space or memory space). You can perform standard
C mathematical operations (addition and subtraction only) on the I/O
handle. The READ_CCR, WRITE_CCR, and the other macros construct
the first argument by referencing the I/O handle that is defined in the
el_softc data structure.
1–8 Network Device Driver Environment
Reads a byte (8 bits) from a device register.
Reads a word (16 bits) from a device register.
Reads a longword (32 bits) from a device register.
Reads a quadword (64 bits) from a device register.
Writes a byte (8 bits) to a device register.
Writes a word (16 bits) to a device register.
Writes a longword (32 bits) to a device register.
Writes a quadword (64 bits) to a device register.
READ_BUS_D16((sc)->reg4); mb();
WRITE_BUS_D16((sc)->reg4, (val)); mb();
READ_BUS_D16((sc)->reg6); mb();
WRITE_BUS_D16((sc)->reg6, (val)); mb();
WRITE_BUS_D16((sc)->reg8, (val)); mb();
WRITE_BUS_D16((sc)->regA, (val)); mb();
READ_BUS_D16((sc)->regC); mb();
WRITE_BUS_D16((sc)->regE, (val)); \
mb(); el_wait((sc))
READ_BUS_D16((sc)->regE); mb();
WRITE_BUS_D32((sc)->data, (val)); mb();
READ_BUS_D32((sc)->data); mb();
READ_BUS_D16((sc)->reg6); mb();
WRITE_BUS_D16((sc)->reg6, (val)); mb();
READ_BUS_D16((sc)->regA); mb();
WRITE_BUS_D16((sc)->regA, (val)); mb();
READ_BUS_D16((sc)->regC); mb();
READ_BUS_D16((sc)->regA); mb();
WRITE_BUS_D16((sc)->reg0, (val)); mb();
WRITE_BUS_D16((sc)->reg2, (val)); mb();
WRITE_BUS_D16((sc)->reg4, (val)); mb();
READ_BUS_D16((sc)->regA); mb();
WRITE_BUS_D16((sc)->regA, (val)); mb();
READ_BUS_D16((sc)->reg8); mb();
READ_BUS_D16((sc)->reg4); mb();
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