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};
#define TX_INT
#define W1_RXDATA
#define W1_TXDATA
#define W1_FREETX
Defines the offset for the receive status register.
1
Defines an enumerated data type called w1_rxstat. The if_el device
2
driver can assign one of the following values to W1_RXSTAT (the receive
status register):
RX_IC
RX_ER
RX_EM
RX_EOR
RX_ERT
RX_EAL
RX_ECR
RX_EOS
RX_BYTES
Defines the offset for the transmit status register.
3
Defines an enumerated data type called w1_txstat. The if_el
4
device driver can assign one of the following values to W1_TXSTAT (the
transmit status register):
TX_CM
TX_IS
TX_JB
TX_UN
TX_MC
TX_OF
TX_RE
Defines the offset for the request interrupt after completion register.
5
Defines the offset for the receive data register.
6
Defines the offset for the transmit data register.
7
2–10 Defining Device Register Offsets
0x8000
5
0x0
6
0x0
7
0xc
8
Indicates an incomplete operation.
Indicates an error in the operation.
If any of the bits are set in the mask, indicates
that an error has occurred.
Indicates an overrun error in the operation.
Indicates a run-time error.
Indicates an alignment error.
Indicates a CRC error.
Indicates an oversize error.
Mask used to determine the number of bytes received.
Indicates that the transmission completed.
Indicates that the device should interrupt when a
transmission is successfully completed.
Indicates a jabber error.
Indicates an underrun. This is a serious error
that requires a reset.
Indicates the maximum number of colli-
sions that occurred.
Indicates an overflow error.
Not currently used.
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