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Defines an enumerated data type called w0_rcr. The if_el device
8
driver can assign one of the following bits to W0_RCR (the resource
configuration register):
RCR_IRQ
RCR_RSV
Defines the offset for the EEPROM command register.
9
Defines an enumerated data type called w0_ecr. The if_el device
10
driver can assign one of the following bits to W0_ECR (the EEPROM
command register):
ECR_EBY
ECR_TST
ECR_CMD
ECR_READ
ECR_WRITE
ECR_ERASE
ECR_EWENA
ECR_EWDIS
ECR_EAR
ECR_WAR
Defines the offset for the EEPROM data register.
11
2.4 Window 3 Configuration Register Offset Definitions
The window 3 configuration registers consist of the additional setup
information registers shown in Figure 2–2.
Represents the interrupt request (IRQ).
Represents a reserved field.
Indicates that the EEPROM is busy.
Indicates that the EEPROM is in test mode.
Represents EEPROM command bits.
Represents an EEPROM read command.
Represents an EEPROM write command.
Represents an EEPROM erase command.
Represents an EEPROM enable erase or
write command.
Represents an EEPROM disable erase or
write command.
Represents an EEPROM erase all registers command.
Represents an EEPROM write all registers command.
Defining Device Register Offsets 2–7
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