Interface Circuit - Epson LX-300 Service Manual

LX-300 Sanka Manual

2.3.9 Interface Circuit

Figure 2-20 shows the parallel interface circuit block diagram. Data from the host mmputer is
latched within the system IC by a WOOSTROBE signal. The system IC outputs a BUSY signal
automatically to stop the host computer from sending further data. The CPU block reads the data
latched in the gate array block periodically without generating an interrupt.
PARALLEL l/F
Figure 2-20. Parallel Interface Block Diagram
the
Figure 2-21 shows serial interface circuit block diagram. The serial interface conforms to
data received by the serial 1/0 of the CPU block from the host commter via
driver/receiver IC2. Data is trans%tted to an irmut buffer in the svstem IC from the Cl% block.
Printing starts when a CR code is received or whe~ the input but%r & filled.
TXD
DTR
CTS
Figure 2-21. Serial Interface Block Diagram
STSTEM IC
I C I
y / / / / y / / / / / / / / / 'ND7-0
STROBE
. . . . . .
35' Pcl
6. ~
SYSTEM IC (ICI)
PB3
I
2-17