Table of Contents
Advertisement
3.9.1 – North Bridge Chipset Configuration Sub-Menu
This menu gives options for customizing memory & Hypertransport settings.
Select a menu by highlighting it using the Arrow ( / ) keys and pressing Enter.
The settings are described on the following pages.
Main
Advanced
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
DRAM Timing Configuration
IOMMU Option Menu
Memory CLK
CAS latency (Tcl)
RAS/CAS Delay (Trcd)
Min Active RAS (Tras)
Row Precharge Time (Trp)
RAS/RAS Delay (Trrd)
Row Cycle (Trc)
Feature
NorthBridge Chipset Configuration
Memory CLK
CAS Latency (Tcl)
RAS/CAS Delay (Trcd)
BIOS Setup Utility
PCI/PnP
Boot
:XXX MHz
:XX
:X CLK
:X CLK
:X CLK
:X CLK
:XX CLK
Option
It shows the clock frequency of the
Read only
installed SDRAM.
This controls the timing delay (in clock
Read only
cycles) before SDRAM starts a read
command after receiving it.
When DRAM is refreshed, both rows
and columns are addressed
separately. This setup item allows you
to determine the timing of the transition
Read only
from RAS (row address strobe) to CAS
(column address strobe). The less the
clock cycles, the faster the DRAM
performance.
71
http://www.tyan.com
Security
Chipset
← → Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1
General Help
F10 Save and Exit
ESC Exit
Description
Exit
Advertisement
Table of Contents
