Word Clock; Operation And Technical Background - RME Audio ADI-8 DS User Manual

Syncalign, synccheck, intelligent clock control hi-precision 24 bit / 96 khz 8 channel ad / da-converter adat optical / tdif-1 interface digital 24 bit interface / format converter
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8. Word Clock

8.1 Operation and Technical Background

In the analog domain one can connect any device to another device, synchronization is not
necessary. Digital audio is different. Correct interpretation of digital audio data is dependent
upon a definite sample frequency. Signals can only be correctly processed or transferred be-
tween devices if these all share the same clock. Otherwise digital signals are misinterpreted,
causing distortion, clicks/crackle and even dropouts.
AES/EBU, SPDIF and ADAT optical are self-clocking (seen from a non-technical view TDIF too,
as word clock is embedded inside the TDIF cable), so an additional line for word clock could be
considered redundant. In practice however, using several devices at the same time can cause
problems. For example, if devices are connected in a loop without there being a defined 'mas-
ter' device, self-clocking may break down. Besides, the clocks of all devices must be synchro-
nized from a single source. Devices without SPDIF inputs (typically playback devices such as
CD- players) cannot be synchronized via self-clocking. Finally there are 'problematic' devices,
which are nearly un-usable without a word clock attached anyway.
In digital studios, synchronization requirements can be met by connecting all devices to a cen-
tral sync source. For instance, the master device could be a mixing desk, sending a reference
signal - word clock - to all other devices. However, this will only work if all the other devices
have word clock or sync inputs (e.g. some professional CD-players), allowing them to run as
slaves. This being the case, all devices will receive the same clock signal, so there is no fun-
damental reason for sync problems when they are connected together.
But word clock is not only the 'great problem solver', it also has some disadvantages. The word
clock is based on a fraction of the really needed clock. For example SPDIF: 44.1 kHz word
clock (a simple square wave signal) has to be multiplied by 128 or 256. This signal then re-
places the one from the internal quartz crystal. Because of the high multiplication factor the
reconstructed clock will have great deviations called jitter. The jitter of a word clock is much
higher as when using a quartz based clock.
The end of these problems should have been the so called Superclock, which uses 256 times
the word clock frequency. This equals the internal quartz frequency, so no PLL for multiplying is
needed and the clock can be used directly. But reality was different, the Superclock proved to
be much more critical than word clock. A square wave signal of 11 MHz distributed to several
devices - this simply means to fight with high frequency technology. Reflections, cable quality,
capacitive loads - at 44.1 kHz these factors may be ignored, at 11 MHz they are the end of the
clock network. Additionally it was found that a PLL not only generates jitter, but also rejects
disturbances. The slow PLL works like a filter for induced and modulated frequencies above
several kHz. As the Superclock is used without any filtering such a kind of jitter and noise sup-
pression is missing.
The usage of word clock with ADAT optical is critical too. The ADI-8 DS always uses a Bitclock
PLL, no matter if the clock reference is word clock or ADAT. Thanks to its very fine resolution
this exceptional circuit is able to follow the complete vari-speed range of the ADAT recorder
without losing a sample. Many other devices use a much coarser word clock PLL to track the
ADAT input. When changing the sample rate (speed) fast, some bits are already sampled inval-
idly before the frequency is corrected. Drop outs and crackling will be the audible result.
User's Guide ADI-8 DS © RME
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