Intel P4000 - 11-2010 SPECIFICATION Specification page 10

Mobile processor
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Errata (Sheet 3 of 5)
Steppings
Number
C-2
AAZ44
X
AAZ45
X
AAZ46
X
AAZ47
X
AAZ48
X
AAZ49
X
AAZ50
X
AAZ51
X
AAZ52
X
AAZ53
X
AAZ54
X
AAZ55
X
AAZ56
X
AAZ57
X
AAZ58
X
AAZ59
X
AAZ60
X
AAZ61
X
AAZ62
X
AAZ63
X
AAZ64
X
10
Status
K-0
Performance Monitor Event Offcore_response_0 (B7H) Does Not
X
No Fix
Count NT Stores to Local DRAM Correctly
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM
X
No Fix
Exits after a Translation Change
Back-to-Back Uncorrected Machine Check Errors May Overwrite
X
No Fix
IA32_MC3_STATUS.MSCOD
Corrected Errors with a Yellow Error Indication May Be
X
No Fix
Overwritten by Other Corrected Errors
Performance Monitor Events DCACHE_CACHE_LD and
X
No Fix
DCACHE_CACHE_ST May Overcount
Performance Monitor Events INSTR_RETIRED and
X
No Fix
MEM_INST_RETIRED May Count Inaccurately
A Page Fault May Not Be Generated When the PS Bit Is Set to
X
No Fix
"1" in a PML4E or PDPTE
BIST Results May Be Additionally Reported after a
X
No Fix
GETSEC[WAKEUP] or INIT-SIPI Sequence
Pending x87 FPU Exceptions (#MF) May Be Signaled Earlier
X
No Fix
Than Expected
VM Exits Due to "NMI-Window Exiting" May Be Delayed by One
X
No Fix
Instruction
VM Exits Due to EPT Violations Do Not Record Information about
X
No Fix
Pre-IRET NMI Blocking.
Multiple Performance Monitor Interrupts are Possible on
X
No Fix
Overflow of IA32_FIXED_CTR2
LBRs May Not be Initialized During Power-On Reset of the
X
No Fix
Processor
LBR, BTM or BTS Records May Have Incorrect Branch From
X
No Fix
Information After an Enhanced Intel SpeedStep® Technology
Transition, T-states, C1E, or Adaptive Thermal Throttling
VMX-Preemption Timer Does Not Count Down at the Rate
X
No Fix
Specified
Multiple Performance Monitor Interrupts Are Possible on
X
No Fix
Overflow of Fixed Counter 0
VM Exits Due to LIDT/LGDT/SIDT/SGDT Do Not Report Correct
X
No Fix
Operand Size
DPRSLPVR Signal May Be Incorrectly Asserted on Transition
X
No Fix
between Low Power C-states
Performance Monitoring Events STORE_BLOCKS.NOT_STA and
X
No Fix
STORE_BLOCKS.STA May Not Count Events Correctly
Storage of PEBS Record Delayed Following Execution of MOV SS
X
No Fix
or STI
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May
X
No Fix
Not Count Some Transitions
Summary Tables of Changes
ERRATA
Specification Update

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