Sampling Rate - Red Hat ENTERPRISE LINUX 5 - DEPLOYMENT Deployment Manual

Chapter 39. OProfile
Processor
Pentium Pro, Pentium
II, Pentium III, Athlon,
AMD64
Pentium 4 (HT and
non-HT)
Itanium 2
TIMER_INT
ppc64/power4
ppc64/power5
ppc64/970
Table 39.3. Default Events
The number of events that can be monitored at one time is determined by the number of counters for
the processor. However, it is not a one-to-one correlation; on some processors, certain events must
be mapped to specific counters. To determine the number of counters available, execute the following
command:
ls -d /dev/oprofile/[0-9]*
The events available vary depending on the processor type. To determine the events available for
profiling, execute the following command as root (the list is specific to the system's processor type):
ophelp
The events for each counter can be configured via the command line or with a graphical interface. For
more information on the graphical interface, refer to
cannot be set to a specific event, an error message is displayed.
To set the event for each configurable counter via the command line, use opcontrol:
opcontrol --event=<event-name>:<sample-rate>
Replace <event-name> with the exact name of the event from ophelp, and replace <sample-
rate> with the number of events between samples.

39.2.2.1. Sampling Rate

By default, a time-based event set is selected. It creates a sample every 100,000 clock cycles per
processor. If the timer interrupt is used, the timer is set to whatever the jiffy rate is and is not user-
settable. If the cpu_type is not timer, each event can have a sampling rate set for it. The sampling
rate is the number of events between each sample snapshot.
When setting the event for the counter, a sample rate can also be specified:
538
Default Event for Counter
CPU_CLK_UNHALTED
GLOBAL_POWER_EVENTS
CPU_CYCLES
(none)
CYCLES
CYCLES
CYCLES
Description
The processor's clock is not halted
The time during which the processor is
not stopped
CPU Cycles
Sample for each timer interrupt
Processor Cycles
Processor Cycles
Processor Cycles
Section 39.8, "Graphical Interface". If the counter