Advanced Chipset - TYAN TITAN III Manual

Table of Contents

Advertisement

w w Onboard PCI IDE Sec. PIO Mode
This option lets you select the PIO Mode for the IDE HDD that is
attached to your secondary controller. Choices are from mode 0 thru
mode 4. If you are not sure which mode your drive supports, use the
Auto option. The default is Auto.
w w Onboard PCI IDE 32bit Mode
This option Enables or Disables PCI IDE 32-bit transfer mode. Be
aware that not all drives support this mode. The default is enabled.
w w Primary Master LBA Mode
Primary Slave LBA Mode
Secondary Master LBA Mode
Secondary Slave LBA Mode
This option enables or disables LBA (Logical Block Addressing)
support for each of the drives. LBA Mode is an advanced method for
accessing data on IDE drives. Data is accessed by block addresses
rather than the traditional Cylinder-Header-Sector scheme. LBA Mode
also breaks the 528MB size limit imposed by older IDE drives. Enable
only if your drive can support LBA. The default is disabled.
w w Secondary Ctrl Drives Present
This option specifies the number of IDE drives controlled by the
onboard secondary IDE controller. The settings are None, 1(drive), or
2(drives).
The default is None.

5.3 Advanced Chipset

w w Memory Hole
This option lets you create a memory hole for either the 512-640KB
region or the 15-16MB region. The default is disabled.
w w DRAM Speed
This option should be set according to the speed of the DRAM in the
system. The value of this option determines how the DRAM timing
should be programmed in the chipset. The options are 60ns and 70ns.
The default is 60ns.
S1468-001-01
48

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

S1468

Table of Contents