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Feature
CPU Configuration
Module Version
Physical Count
Logical Count
Revision
Cache L1
Cache L2
Speed
Current FSB Multiplier
Maximum FSB Multiplier
Able to change Freq.
uCode Patch Level
GART Error Reporting
MTRR Mapping
Option
Read only
Read only
Disabled
Enabled
Continuous
Discrete
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Description
Displays information about CPU
Displays information about CPU
This option should remain disabled
for normal operation. The driver
developer may enable it for the
purpose of testing.
This option determines the method
used for programming CPU
MTRRs when 4GB or more of
memory is preset. Discrete leaves
the PCI hole below the 4GB
boundary undescribed.
Continuous explicitly describes the
PCI hole as non-cacheable.
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