TYAN THUNDER 2 ATX Manual
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TYAN THUNDER 2 ATX Manual

TYAN THUNDER 2 ATX Manual

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Notice for the USA
Compliance Information Statement (Declaration of Conformity Proce-
dure) DoC
FCC Part 15: This Device complies with Part 15 of the FCC Rules.
Operation is subject to the following conditions:
1) this device may not cause harmful interference, and
2) this device must accept any interference received including interfer-
ence that may cause undesired operation. If this equipment does cause
harmful interference to radio or television reception, which can be
determined by turning the equipment off and on, the user is encouraged
to try one or more of the following measures:
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Plug the equipment into an outlet on a circuit different from
that of the receiver.
Consult the dealer or an experienced radio/television
technician for help.
Notice for Canada
This apparatus complies with the Class B limits for radio interference
as specified in the Canadian Department of Communications Radio
Interference Regulations.
Cet appareil est conforme aux normes de Classe B d' interference
radio tel que spécifié par le Ministére Canadien des Communications
dans les réglements d' interférence radio.
Notice for Europe (CE Mark)
This product is in conformity with the Council Directive 89/336/EEC,
92/31/EEC (EMC).

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  • Page 1 Notice for the USA Compliance Information Statement (Declaration of Conformity Proce- dure) DoC FCC Part 15: This Device complies with Part 15 of the FCC Rules. Operation is subject to the following conditions: 1) this device may not cause harmful interference, and 2) this device must accept any interference received including interfer- ence that may cause undesired operation.

  • Page 2: Table Of Contents

    Table of Contents 1. Introduction............... 4 Overview..............4 Icons................5 Hardware Specifications/Features......... 6 Software Specifications..........9 Technical Support............9 Returning Merchandise for Service........ 10 2. Board Installation.............. 12 Unpacking..............12 Installation..............13 Setting Jumpers............13 3. Onboard Resource Settings..........14 Quick References for Jumpers........14 Map of Motherboard Jumpers........
  • Page 3 5. System Resources............. 60 POST Checkpoint Codes..........60 Beep Codes..............68 Troubleshooting System Problems........69 Displayed Error Messages..........70 Additional Manuals............72...

  • Page 4: Introduction

    Chapter 1 Introduction Overview The Thunder 2 (S1696DLUA) is a quality, high performance motherboard designed for Intel’ s latest generation of Pentium II microprocessors. This motherboard utilizes Intel’ s 440LX AGP series chipset (also called AGPset) and supports Pentium II CPU speeds of 233MHz to 300MHz.

  • Page 5: Icons

    ML wavetable and 3D sound chips, onboard floppy controller, and onboard high speed I/O. The Thunder 2 board is built to be both flexible and expandable. With I/O and drive controller support built onboard, the four 32-bit PCI BUS Master and two ISA slots (one shared, six usable) are available for add-on expansion cards.

  • Page 6: Hardware Specifications/Features

    Chapter 1 Hardware Specifications/Features s Pentium II 233-300 MHz. Processor Information s Two SEC slots (Slot One). s 2 VRM components installed onboard. s 3 onboard CPU fan connectors. s Intel MPS v1.4 compliant. s Intel 440LX AGPset. Chipset Information s Intel 82371AB(PIIX4).
  • Page 7 s Onboard National LM78 thermal control chip for heat, fan, and voltage. Reports to the operating system for system monitoring. LANdesk compatible. s Intel LANDesk Client Manager software, and/or Intel LANDesk Server Manager software (with LM78 installed). s One AGP slot for 3D graphics card Expansion Slots (supports 1x and 2x).
  • Page 8 Chapter 1 s UltraDMA 33 BUS Mastering Mode (up to 33MB/sec DTR). s Two floppy drives (up to 2.88MB). s Two ATX serial ports (16550 UARTs). s One ATX ECP/EPP parallel port. s One IR (InfraRed) I/O interface port. s Two USB rev 1.2 (universal serial BUS) ports.

  • Page 9: Software Specifications

    (which can have expensive conse- quences). If your dealer is unable to assist you: Try our web page – http:// www.tyan.com, or user newsgroup – alt.comp.periphs.mainboard.tyan.

  • Page 10: Returning Merchandise For Service

    Windows is a trademark of Microsoft Corporation. IBM, PC, AT, PS/2 are trademarks of IBM Corporation. INTEL, Pentium II are trademarks of Intel Corporation. S1696DLUA Thunder 2 is a trademark of TYAN Computer Corporation. All other trademarks are the property of their respective companies.
  • Page 11 This page has been left blank intentionally.

  • Page 12: Board Installation

    Chapter 2 Board Installation Unpacking The mainboard package should contain the following: S1696DLUA mainboard One IDE 40-pin cable One 34-pin floppy cable One 50-pin narrow SCSI cable One 68-pin wide SCSI cable One Thunder 2 user’ s manual One SCSI and sound appendix package (appendices A, B, and C) Two retention modules The mainboard contains sensitive electric components which can be easily damaged by static electricity, so the mainboard should be left in...

  • Page 13: Installation

    After opening the mainboard carton, extract the system board–holding it by its edges–and place it on a grounded anti-static surface, compo- nent side up. Inspect the board for damage. Press down on any of the socket ICs if it appears that they are not properly seated (the board should still be on an anti-static mat).

  • Page 14: Onboard Resource Settings

    Chapter 3 Onboard Resource Settings Quick References for Jumpers The following tables will help you set the jumpers for CPU speed, memory voltage settings, and SCSI PCI-ID, among others. The miniature motherboard maps will help you locate the jumpers on your board. A full- page map of the motherboard can be found on page 15.

  • Page 15: Map Of Motherboard Jumpers

    Map of Motherboard Jumpers ATX power connector Mouse LM78 chip LM75 chip USB2 Pentium II CPU Slot 1 W. SCSI CH II FAN3 W. SCSI CH I Intel JP33 N. SCSI 82443LX Secondary IDE chip Primary IDE LM75 chip Floppy Pentium II CPU Slot 2 JP23 AGP (Accelerated Graphics Port)
  • Page 16 Chapter 3 built-in dual VRM LM78 440LX Narrow SCSI Ultra-Wide SCSI PIIX 4 Built-in current OPL4-ML wavetable chip RAID port Flash BIOS overload protection Adaptec AIC-7895 Ultra-Wide SCSI chip APIC (Advanced Programmable Interrupt Controller) for multiprocessor Pin Assignments JP21 (Wake-on LAN) Standby 5V Wake (Power-on Active High) FAN1-FAN3...
  • Page 17 Jumper Settings by CPU Type JP7 JP8 JP9 JP10 Pentium II 200MHz Pentium II 233MHz Pentium II 266MHz Pentium II 300MHz *Due to this CPU’ s unavailability, *Pentium II 333MHz this speed has not been tested. DIMM Voltage Settings DIMM VCC J30 J31 J32 J33 J34 J35 J36 J37 3.3V (default) OFF OFF OFF...
  • Page 18 Chapter 3 Reserved JP38-JP40 Reserved OPEN JP38 Hardwired ON JP39 Hardwired ON JP40 JP48 OPEN JP41-JP42 COM2/InfraRed Settings COM2 JP41 JP42 JP45 JP46 SCSI Termination Settings CMOS Voltage Settings Pins Assignment CH. A 5V (default) JP43 SCSI high byte termination: all on (default) Termination control by SCSI chip CH.

  • Page 19: Soft Power Connector

    Soft Power Connector The Soft Power Connector is located on pins 1 and 2 of jumper block J25. Pressing the Soft Power Button will turn the system on (and off). Sleep Button Connector The sleep button connector is located on pin 3 and pin 4 of jumper block J25.

  • Page 20: Hardware Reset Switch Connector Installation

    Windows 95. This is a software problem, not a hardware problem, and can be easily remedied by either upgrading to Windows 98 or download- ing the 82371AB patch found at http://www.tyan.com or at ftp:// download.intel.com/design/pcisets/busmastr/setupex.exe. (Note: USB re- quires Windows 95 OSR 2.1 or above; please contact Microsoft for the USB update.)

  • Page 21: Flash Eeprom

    Flash EEPROM The S1696DLUA uses flash memory to store BIOS programs. It can be updated as new versions of the BIOS become available. You can upgrade your BIOS easily using the flash utility (see page 58). JP4 determines which type of EPROM is used. This jumper has been set to match the onboard BIOS chip.
  • Page 22 Chapter 3 Unbuffered 168-pin DIMM Buffered Some details of memory installation: s One unbuffered DIMM must be installed for the system to POST. s The mainboard supports 8MB, 16MB, 32MB, 64MB, 128MB (SDRAM), and 256MB (EDO only) DIMM modules. The table below shows some of the possible memory configurations. DIMM Bank 2 DIMM Bank 3 DIMM Bank 0 DIMM Bank 1...

  • Page 23: Installing The Cpu

    Installing the CPU Pentium II processors (233 through 300MHz) can be used on the S1696DLUA. Please refer to page 15 for the correct CPU jumper set- tings for your board. Although the S1696DLUA motherboard is designed as a dual CPU system, it will also function with a single CPU. The S1696DLUA board provides two slots for Pentium II processors, called the Pentium II primary and secondary slots.
  • Page 24 Chapter 3 Pentium II Active (Boxed) CPU Pentium II Passive CPU Shown with Power Connector for Fan Shown with Heat-sink Installation of Pentium II Active (Boxed) Processors Active processors are equipped with cooling fans. When installing an active CPU, you also need to connect the cooling fan cable to its connector.
  • Page 25 4. Drop the retention module down over the Pentium II slot so that the retention module sits flat against the motherboard. Tighten the screws in a clockwise manner to secure the module to the board. Warning: Do not over- tighten the screws as you may damage the module and/or the motherboard.
  • Page 26 Chapter 3 Installation of Pentium II Passive Processors Unlike active processors, passive processors are not equipped with cooling fans. Instead, they are equipped with heat sinks. Each CPU package should contain the following: One CPU retention module One heat sink retention bracket with mounting locks Two mounting attach-mounts One heat sink lock...
  • Page 27 installed bracket can be verified by making sure that the four pins on the top are closest to the Pentium II CPU slot. 2. Insert the heat sink mount into the holes on the motherboard. When the bracket is prop- erly inserted into the holes on the motherboard, you will hear a clicking noise.

  • Page 28: Peripheral Device Installation

    Chapter 3 Removing Pentium II Passive Processors and CPU Retention Modules To remove the CPU, move the locks to the center of the CPU. A click will be heard when the CPU has been unlocked. Gently pull up on the CPU, taking care not to bend the motherboard or the CPU retention module.
  • Page 29 Most male power supply connectors will have twenty wires, seven of which are black. The black wires will be in the middle of the connector. The easiest way to orient the connectors properly is to line up the plastic clip on the male connector with the tab on the female connector. The plastic clip should be facing the edge of the motherboard.

  • Page 30: Frequently Asked Questions

    Chapter 3 Frequently Asked Questions Q: Why don’ t I get a display after I put in my old DIMM module? A: The 440LX chipset requires the memory manufacturer to program an EEPROM chip with SPD (Serial Presence Detection) on the module in order for the BIOS to program the 440LX’...
  • Page 31 Q: How do I know if the system detects the number of CPUs properly? A: The AMI BIOS will show a “Pentium–II x2” message during the memory check to indicate the presence of two CPUs. Q: How many devices can I hook up to each SCSI channel? A: You can cascade up to fifteen 16-bit devices per channel and seven of them can be 8-bit devices.

  • Page 32: Bios Configuration

    Chapter 4 BIOS Configuration Standard Setup Select the AMIBIOS Setup options below by choosing Standard Setup from the AMIBIOS Setup main menu. Standard Setup options are described below. Floppy Drive A: and B: Move the cursor to these fields via the arrow keys and select the floppy type.
  • Page 33 Type How to Configure Select Type. Select Not Installed on the drive parameter screen. The SCSI SCSI drivers provided by the SCSI manufacturer should allow you to configure the SCSI drive. Select Type. Select Auto to let AMIBIOS determine the parameters. Click on OK when AMIBIOS displays the drive parameters.

  • Page 34: Bios Features Setup

    Chapter 4 Write Landing Type Cylinders Heads Sectors Capacity Precompensation Zone 10 MB 20 MB 31 MB 62 MB 47 MB 65535 20 MB 31 MB 65535 30 MB 65535 112 MB 65535 20 MB 65535 35 MB 65535 50 MB 20 MB 65535 43 MB...

  • Page 35: Advanced Setup

    Advanced Setup The Advanced Setup options included in the AMIBIOS Setup gener- ated through AMIBCP and the AMIBIOS for the Intel 440LX chipset are described in this chapter. Select Advanced Setup from the AMIBIOS Setup main menu to display the Advanced Setup options. Default Settings Every option in AMIBIOS Setup contains two default values: an Fail- Safe default and the Optimal default value.
  • Page 36 Chapter 4 1st Boot Device This option sets the type of device for the first boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes. The settings are Disabled, Network, Floptical, SCSI, CDROM, IDE-0, IDE-1, IDE-2, or IDE-3. The Optimal and Fail-Safe default settings are IDE-0.
  • Page 37 Display Mode At Add-On ROM Init This option specifies the system display mode that is set at the time that AMIBIOS POST initializes an optional option ROM. The settings are as follows: Setting Description Force BIOS The display mode currently being used by AMIBIOS is used. Keep Current The current display mode is used.
  • Page 38 Chapter 4 PS/2 Mouse Support Set this option to Enabled to enable AMIBIOS support for a PS/2-type mouse. The BIOS will allocate IRQ12 for the PS/2 mouse. The settings are Enabled or Disabled. The Optimal and Fail-Safe default settings are Enabled. Primary Display This option configures the type of monitor attached to the computer.
  • Page 39 System BIOS Cacheable When set to Enabled, the contents of the F0000h system memory segment can be read from or written to cache memory. The contents of this memory segment are always copied from the BIOS ROM to system RAM for faster execution. The settings are Enabled or Dis- abled.

  • Page 40: Chipset Setup

    Chapter 4 Chipset Setup Choose Chipset Setup on the AMIBIOS Setup main menu. All Chipset Setup options are then displayed. AMIBIOS Setup can be customized. AMIBIOS Setup can be customized via AMIBCP. See the AMIBIOS Utilities Guide for additional information. USB Function Set this option to Enabled to enable USB (Universal Serial Bus) support.
  • Page 41 EDO RAS Precharge This option specifies the length of the RAS precharge part of the DRAM system memory access cycle when EDO DRAM system memory is installed in this computer. The settings are 3 CLKs or 4 CLKs. The Optimal and Fail-Safe default settings are 4 CLKs. EDO RAS To CAS This option specifies the length of the delay inserted between the RAS and CAS signals of the DRAM system memory access cycle when...
  • Page 42 Chapter 4 RAS Precharge This option specifies the length of the RAS precharge part of the DRAM system memory access cycle when EDO DRAM system memory is installed in this computer. The settings are 3 CLKs or 4 CLKs. The Optimal and Fail-Safe default settings are 4 CLKs. VGA Frame Buffer USWC Set this option to Enabled to enable the VGA video frame buffer using USWC (Uncacheable, Speculatable, Write-Combined) memory.
  • Page 43 Fixed Memory Hole This option specifies the location of an area of memory that cannot be addressed on the ISA bus. The settings are Disabled, 15 MB-16 MB, or 512KB-640KB. The Optimal and Fail-Safe default settings are Dis- abled. TypeF DMA BufferControl1 and TypeF DMA Buffer Control2 These options specify the DMA channel where TypeF buffer control is implemented.
  • Page 44 Chapter 4 USWC Write I/O Post This option sets the status of USWC posted writes to I/O. The settings are: Setting Description Enabled USWC posted writes to I/O are enabled. Disabled USWC posted writes to I/O are disabled. AMIBIOS automatically determines if USWC posted writes to I/O should be enabled and sets this Auto option accordingly.
  • Page 45 settings are Auto (AMIBIOS automatically determines the correct setting), 48mA, 42mA, or 22mA. The Optimal and Fail-Safe default settings are Auto. SCAS3 Buf. Strength This option sets the strength of the signal for the SCAS3 buffer. The settings are Auto (AMIBIOS automatically determines the correct setting), 48mA, 42mA, or 22mA.
  • Page 46 Chapter 4 setting), 42mA, 38mA, or 33mA. The Optimal and Fail-Safe default settings are Auto. DQM Buf. Strength This option sets the strength of the signal for the DQM buffer. The settings are Auto (AMIBIOS automatically determines the correct setting), 42mA, 38mA, or 33mA. The Optimal and Fail-Safe default settings are Auto.
  • Page 47 AGP System Error Forwarding Set this option to Enabled to enable AGP system errors to be for- warded. The settings are Enabled or Disabled. The Optimal and Fail- Safe default settings are Enabled. AGP Parity Error Response Set this option to Enabled to enable AGP parity error response. The settings are Enabled or Disabled.
  • Page 48 Chapter 4 PIIX4 chip. The settings are Enabled or Disabled. The Optimal and Fail-Safe default settings are Enabled. Master Lat. Timer This option specifies the latency for the Timer. The settings are 00h through F8h in increments of 08h. The settings are 00h.

  • Page 49: Power Management Setup

    Power Management Setup The AMIBIOS Setup options described in this section are selected by choosing Power Management Setup from the AMIBIOS Setup main menu. ACPI Aware OS Set this option to Enabled to enable Advanced Configuration and Power Interface (ACPI) BIOS for an ACPI-aware operating system. Power Management/APM Set this option to Enabled to enable the chipset power management and APM (Advanced Power Management) features.
  • Page 50 Chapter 4 are Off, Standby, Suspend, or Disabled. The Optimal and Fail-Safe default settings are Disabled. Video Power Down Mode This option specifies the power state that the video subsystem enters when AMIBIOS places it in a power saving state after the specified period of display inactivity has expired.
  • Page 51 Suspend Timeout This option specifies the length of a period of system inactivity while in Standby state. When this length of time expires, the computer enters Suspend power state. The settings are Disabled, 4 msec, 8 msec, 12 msec, 16 msec, up to 508 msec, in increments of 4 msec. The Optimal and Fail-Safe default settings are Disabled.

  • Page 52: Pci/Pnp Setup

    Chapter 4 PCI/PnP Setup Choose PCI/Plug and Play Setup from the AMIBIOS Setup screen to display the PCI and Plug and Play Setup options, described below. Plug and Play Aware O/S Set this option to Yes to inform AMIBIOS that the operating system can handle plug and Play (PnP) devices.
  • Page 53 PCI IDE Bus Master Set this option to Enabled to specify that the IDE controller on the PCI bus has bus mastering capability. The settings are Disabled or Enabled. The Optimal and Fail-Safe default settings are Disabled. Offboard PCI IDE Card This option specifies if an offboard PCI IDE controller adapter card is used in the computer.
  • Page 54 Chapter 4 DMA Channel 0, DMA Channel 1, DMA Channel 3, DMA Chan- nel 5, DMA Channel 6, and DMA Channel 7 These options allow you to specify the bus type used by each DMA channel. The settings are PnP or ISA/EISA . The Optimal and Fail- Safe default settings are PnP.

  • Page 55: Peripheral Setup

    Peripheral Setup Peripheral Setup options are displayed by choosing Peripheral Setup from the AMIBIOS Setup main menu. All Peripheral Setup options are described here. Onboard FDC Set this option to Enabled to enable the floppy drive controller on the motherboard. The settings are Auto (AMIBIOS automatically deter- mines if the floppy controller should be enabled), Enabled, or Dis- abled.
  • Page 56 Chapter 4 Receiver Polarity This option specifies if the IRQ signal for IR transmission is Active High or Active Low. The settings are Active High or Active Low. There are no default settings. Transmitter Polarity This option specifies if the IRQ signal for IR transmission is Active High or Active Low.
  • Page 57 Parallel Port IRQ This option specifies the IRQ used by the parallel port. The settings are Auto, (IRQ) 5, or (IRQ) 7. The Optimal and Fail-Safe default settings are Auto. Parallel Port DMA Channel This option is only available if the setting for the Parallel Port Mode option is ECP.

  • Page 58: Flash Writer Utility

    Chapter 4 Flash Writer Utility The AMI Flash Writer Utility is now included in the AMIBIOS, and so it is simpler to upgrade the BIOS of your mainboard. The system BIOS is stored on a flash EEPROM ROM chip on the mainboard which can be erased and reprogrammed by following the directions below.
  • Page 59 This page has been left blank intentionally.

  • Page 60: System Resources

    Chapter 5 System Resources POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes diagnostic codes (checkpoint codes) to I/O port 0080h. If teh computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h.
  • Page 61 Uncompressed Initialization Codes The uncompressed initialization codes are listed in order of execution. Checkpoint Code Description The NMI is disabled. Power on delay is starting. Next, the initialization code checksum will be verified. Initializing the DMA controller, performing the keyboard controller BAT test, starting memory refresh, and entering 4 GB flat mode next.
  • Page 62 Chapter 5 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execu- tion. Checkpoint Code Description The onboard floppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next. Initializing the DMA and Interrupt controllers next.
  • Page 63 Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built. Next, disabling cache memory. Uncompressing the POST code next. Next, initializing the CPU and the CPU data area. The CMOS checksum calculation is done next.
  • Page 64 Chapter 5 Checkpoint Code Description All necessary processing before passing control to the video ROM is done. Looking for the video ROM next and passing control to it. The video ROM has returned control to BIOS POST. Performing any required processing after the video ROM had control. Completed post-video ROM test processing.
  • Page 65 Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next. Going to checkpoint 52h next. The memory test started, but not as the result of a soft reset.
  • Page 66 Chapter 5 Checkpoint Code Description Locked key checking is over. Checking for a memory size mismatch with CMOS RAM data next. The memory size check is done. Displaying a soft error and checking for a password or bypassing WINBIOS Setup next. The password was checked.
  • Page 67 Checkpoint Code Description Displaying any soft errors next. The soft error display has completed. Setting the keyboard typematic rate next. The keyboard typematic rate is set. Programming the memory wait states next. Memory wait state programming is over. Clearing the screen and enabling parity and the NMI next.

  • Page 68: Beep Codes

    Chapter 5 Additional BUS Checkpoints While control is in the BUS routines, additional checkpoints are ouput to I/O port address 0080h as word to identify the routines being executed. These are word checkpoints. The low byte of checkpoint is the system BIOS checkpoint where control is passed to the different BUS rou- tines.

  • Page 69: Troubleshooting System Problems

    Beeps Error Message Description Refresh Failure The memory refresh circuitry is faulty. Parity Error Parity error in the base memory (the first 64 KB block) of memory. Base 64 KB Memory Failure Memory failure in first 64 KB. A memory failure in the first 64 KB of memory, or Timer 1 is not Timer Not Operational functioning.

  • Page 70: Displayed Error Messages

    Chapter 5 Displayed Error Messages If an error occurs after the system display has been initialized, the error message will be displayed as follows: ERROR Message Line 1 ERROR Message Line 2 Press <F1> to continue and the system halts. The system does not halt if Wait for <F1> If Any Error in Advanced Setup is Disabled.
  • Page 71 Error Message Explanation D: drive failure No response from hard disk drive D:. Replace the drive. The boot diskette in drive A: cannot be used to boot the system. Use Diskette Boot Failure another boot diskette and follow the screen instructions. Display Switch Not Some systems require a video switch be set to either color or Proper...

  • Page 72: Additional Manuals

    Note that the Adaptec AHA-3940AU/3940AUW User’ s Guide con- tains instructions on installing the SCSI host adapter. As you have purchased a TYAN motherboard with the SCSI chip onboard, you do not need to worry about installing the host adapter. Skip these sections.

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