Analog Devices LTM4709 Demo Manual

Triple 3A, Ultralow Noise, High PSRR, Ultrafast µModule
Linear Regulator with Configurable Output Array
DESCRIPTION
Demonstration circuit 3211A features the
ple 3A, ultralow noise, high PSRR, and ultrafast µModule
linear regulator with a configurable output array. The input
voltage (V ) range is from 0.6V to 5.5V. There are jump-
INn
ers to set a 3-bit trilevel code that determines the output
voltage (V ) at preprogrammed levels that range from
OUTn
0.5V to 4.2V. The maximum output current per chan-
nel is 3A. The DC3211A requires an external BIAS volt-
age (V ) at least 1.2V higher than V
BIASn
2.375V and 5.5V.
The LTM4709 of the DC3211A requires few external
components, therefore, simplifying the circuit design
and significantly reducing solution size. External com-
ponent choice and carefully printed circuit board (PCB)
design help optimize noise, Power Supply Rejection
Ratio (PSRR), load transient response, and V
lation performance. The LTM4709 only requires ceramic
capacitors for the power input and the power output. The
22µF capacitor at the circuit output was chosen for high
frequency PSRR performance and to minimize V
deviation during load transients.
The capacitor that bypasses the V
LTM4709 and the corresponding V
affect PSRR (see the Best PSRR Performance: PCB Layout
for Input Traces section for additional information). The
DC3211A decouples the V
(see the LTM4709 data sheet for the minimum capacitor
value required for V ). Note that an optional bulk 220µF
INn
tantalum polymer capacitor further reduces V
during load transients and reduces input voltage ringing
that can be caused by inductive input power leads.
Document Feedback
LTM 4709, a tri-
®
and between
OUTn
OUTn
power for the
INn
PCB layout can
INn
power with a 4.7µF capacitor
INn
variation
INn
For more information
DEMO MANUAL DC3211A
The LTM4709 has a precision current monitor that
provides accurate current monitoring for the energy
®
management system and current limit. An IMONn termi-
nal is available for the current monitoring of each channel.
The IMONn voltage is the product of the resistance that
programs the current limit and the IMONn pin current,
which is 1/3000 of the output current. By default, the
DC3211A has a 3.3A current limit per channel with IMONRn
tied to GND. However, custom current limit levels can be
programmed by floating IMONRn and connecting a
resistor from IMONn to GND. The externally programmed
current limit is triggered when the IMONn voltage is 1V.
ENn jumpers (JP1, JP2, JP3) are available on the DC3211A
to either connect each channel's ENn pin to V
the output on or to ground to disable the output. There is
regu- a PGn terminal for each channel that is pulled up to V
by a 100k resistor when PGRn is connected to BIAS. PGn
is pulled down by an open-drain, n-channel metal-oxide
semiconductor (nMOS) output for indication of regulator
output status, and other fault modes. The voltage input-
OUTn
to-output control (V
automatically regulating the difference between the input
voltage and output voltage of the LTM4709 to be a fixed
value.
The LTM4709 data sheet must be read in conjunction
with this demo manual before working on or modifying
demonstration circuit DC3211A.
Design files for this circuit board are
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LTM4709
BIASn
) terminal allows connections for
IOC1
available.
to turn
BIASn
Rev. 0
1