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Getting started with the STEVAL-BMS1T, SPI to isolated SPI dongle based on the
Introduction
The
STEVAL-BMS1T
board allows converting SPI signals into ISOSPI signals, reducing the number of necessary wires from 4
to 2, and ensuring an isolated differential communication that is highly immune to noise.
An ISOSPI signal can travel for several meters, maintaining a high ratio between signal and noise.
The ISOSPI protocol features differential communication to ensure higher noise immunity and robustness for long distance
communication.
The
STEVAL-BMS1T
board is based on the
transceiver, which can transfer communication data incoming from a classical 4-wire based SPI interface to a 2-wire isolated
interface (and vice versa).
The L99BM1T hosted on the
any protocol of 8-to-64-bit SPI frames. The SPI peripheral can work up to 10 MHz when configured as a slave. The SPI clock
frequency can be programmed (250 kHz, 1 MHz, 4 MHz, or 8 MHz) when the device is configured as a master.
The transceiver is natively compatible with the L99BM114 IC isolated SPI port, allowing its usage in battery management
system (BMS) applications. The basic BMS analog front-end node board is the STEVAL-BMS114. From the microcontroller side,
the
STEVAL-BMS1T
board can be connected via SPI with STM32 microcontroller families.
UM3422 - Rev 1 - January 2025
For further information, contact your local STMicroelectronics sales office.
Figure 1.
SPI to ISOSPI conversion block diagram
L99BM1T
integrated circuit, a general-purpose SPI to isolated SPI bi-directional
STEVAL-BMS1T
can be configured either as a slave or as a master of the SPI bus and supports
UM3422
User manual
L99BM1T transceiver
www.st.com

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Summary of Contents for ST STEVAL-BMS1T

  • Page 1: Figure 1. Spi To Isospi Conversion Block Diagram

    UM3422 User manual Getting started with the STEVAL-BMS1T, SPI to isolated SPI dongle based on the L99BM1T transceiver Introduction STEVAL-BMS1T board allows converting SPI signals into ISOSPI signals, reducing the number of necessary wires from 4 to 2, and ensuring an isolated differential communication that is highly immune to noise.
  • Page 2: Figure 2. Steval-Bms1T

    UM3422 Figure 2. STEVAL-BMS1T UM3422 - Rev 1 page 2/22...
  • Page 3: Hardware Overview

    Jumper configuration Amplitude and frequency can be set through the microcontroller GPIO on the STEVAL-BMS1T DIS pin. You can enable or disable the STEVAL-BMS1T through jumpers on the DIS pin or through the microcontroller. UM3422 - Rev 1 page 3/22...
  • Page 4: L99Bm1T

    UM3422 Hardware overview Figure 5. Jumpers on DIS pin To enable this pin, use jumpers on TXEN or program the microcontroller to set the TXEN pin. Figure 6. TXEN pin NSLAVE can assume the value 0 (for the slave configuration) or 1 (for the master configuration). L99BM1T The L99BM1T is a general purpose SPI to isolated SPI transceiver IC, which acts as a bridge among devices located in different voltage domains.
  • Page 5: Pin Description

    UM3422 Hardware overview Pin description 1.2.1 SDO, SCK, SDI, NCS pins implement the SPI peripheral, whose configuration depends on the NSLAVE value latched at the first power-up: • SDI is always configured as a digital input. It is internally pulled down with RIN_PD to generate a 0x0 frame in case of pin loss (leading to CRC violation in safety applications).
  • Page 6: Figure 7. Txen Pin

    UM3422 Hardware overview 1. For CPOL = 0, the clock basic value is zero. For CPHA = 0, data are sampled on the clock rising edge and are shifted on the clock falling edge. Figure 7. TXEN pin 2. For CPOL = 0, the clock basic value is zero. For CPHA = 1, data are sampled on the clock falling edge and are shifted on the clock rising edge.
  • Page 7: Nslave

    UM3422 Hardware overview 3. For CPOL = 1, the clock basic value is 1. For CPHA = 0, data are sampled on the clock rising edge and are shifted on the clock falling edge. Figure 9. SPI protocol mode 2 4.
  • Page 8: Bne/Cpol

    UM3422 Hardware overview • Input: is an active high disabling input driven by the MCU: – When DIS is released by the MCU longer than TRC_DELAY+TDIS_DEGLITCH, the device starts the Go To Sleep sequence that brings the L99BM1T to the Stand-by state. –...
  • Page 9: Txamp

    UM3422 Hardware overview • When NSLAVE = 1 (master configuration), this pin acts as a digital input for the selection of CPHA (clock phase). It is latched during Trimming & Config Latch and should be therefore either shorted to GND or to VDD: –...
  • Page 10: Isop And Isom

    UM3422 Hardware overview In the STEVAL-BMS1T the SPICLKFREQ is fixed at 250 kHz. 1.2.9 ISOP and ISOM The isolated SPI interface allows units with different ground levels and/or on different boards to communicate with each other. Physically, the interface is based on twisted-pair wire.
  • Page 11: Table 5. Isofreq Sampling Strategy

    UM3422 Hardware overview Table 5. ISOFREQ sampling strategy L99BM1T L99BM1T ISOFREQ sampling Note state configuration The ISOFREQ pin is latched upon NCS assertion. Therefore, it must be stable at least TISOFREQ_DEGLITCH + TISOFREQ_SETUP before NCS assertion. Moreover, ISOFREQ must be kept stable TISOFREQ_HOLD after NCS assertion in order to fulfil hold In case several SPI frames Slave (NSLAVE =...
  • Page 12: Power Supply

    UM3422 Power supply Power supply The figure below lists the product power supply ranges. Figure 11. Power supply ranges • Within the range of functionality, the part operates as specified and without parameter deviations. All the functionalities and the electrical parameters are guaranteed. •...
  • Page 13: Schematic Diagram

    Schematic diagram Figure 12. STEVAL-BMS1T circuit schematic FAULT mode N.M. 22pF 100nF 100nF I/O1 I/O1 60.4 ISOP ISOp VBUS ISOm ISOM R3 10nF I/O2 I/O2 60.4 Shell Shield USBLC6-2SC6Y USB 2.0 Type A Plug NSLAVE NSLAVE N.M. 22pF TXEN/CPHA TXEN/CPHA...
  • Page 14: Bill Of Materials

    UM3422 Bill of materials Bill of materials Table 6. STEVAL-BMS1T bill of materials Item Q.ty Ref. Part / Value Description Manufacturer Order code C1, C7 22pF 0603 - 50V - NP0 Class I 885012006053 C2, C8 N.M. 1206 N.M. N.M.
  • Page 15 UM3422 Bill of materials Item Q.ty Ref. Part / Value Description Manufacturer Order code WR-PHD 2.54 mm Multi-Jumper for blister 60900213421 60900213421 Jumper with Test Point WR-WTB 2.54 mm Female Terminal for blister 61900411621 61900411621 Housing WR-WTB 2.54 mm Female Terminal for blister 61900711621 61900711621...
  • Page 16: Board Versions

    UM3422 Board versions Board versions Table 7. STEVAL-BMS1T versions Finished good Schematic diagrams Bill of materials STV$BMS1TA STV$BMS1TA schematic diagrams STV$BMS1TA bill of materials 1. This code identifies the STEVAL-BMS1T evaluation board first version. UM3422 - Rev 1 page 16/22...
  • Page 17: Regulatory Compliance Information

    UM3422 Regulatory compliance information Regulatory compliance information Notice for US Federal Communication Commission (FCC) For evaluation only; not FCC approved for resale FCC NOTICE - This kit is designed to allow: (1) Product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and (2) Software developers to write software applications for use with the end product.
  • Page 18: Revision History

    UM3422 Revision history Table 8. Document revision history Date Revision Changes 20-Jan-2025 Initial release. UM3422 - Rev 1 page 18/22...
  • Page 19: Table Of Contents

    UM3422 Contents Contents Hardware overview ..............3 L99BM1T .
  • Page 20: List Of Tables

    STEVAL-BMS1T bill of materials ........
  • Page 21: List Of Figures

    STEVAL-BMS1T circuit schematic........
  • Page 22 ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’...

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