Linear ADI Power Analog Devices DC2713A Demo Manual page 4

DEMO MANUAL DC2713A
BOARD DESCRIPTION
Overview
DC2713A is a 2-layer board with 2oz copper on each
layer. There are large planes for input, output, and ground.
Where possible, the input plane is designed to have at
least 79mil (2mm) clearance to adjacent conductors, to
support 100V DC standoff. Spikes and surges are with-
stood by R1 and RDRN. These components are cho-
sen for wide pad spacing, pulse power capability, and
voltage standoff.
To ease probing, turrets are provided for TMR, V
GATE pins. Note that even a 10MΩ probe or voltmeter
affects measurements of high impedance nodes such as
GATE and TMR. Be careful not to short TMR to ground as
it prevents the LTC4381 from shutting down in the event
of an overvoltage or overcurrent condition, potentially
damaging the LTC4381.
The vast gulf between the current capability of DC2713A-A/
DC2713A-B (0.5A) and DC2713A-C/DC2713A-D (10A)
illustrates a fundamental principle of surge stopper (or hot
swap) application design: the current capability depends
not just on MOSFET R
the MOSFET power dissipation during stressful transients
such as start-up inrush, current limiting, and output regu-
lation during input surge. Since DC2713A-A/DC2713A-B
is designed to ride-through the long duration load dump
surge, its timeout has been prolonged with a 16.8µF TMR
capacitor (versus 22nF on DC2713A-C/DC2713A-D),
reducing its current capability.
Below is a brief description of the main components
of DC2713A.
U1 – Surge Stopper
Depending on the DC2713A assembly version, U1 is
LTC4381-1, LTC4381-2, LTC4381-3, or LTC4381-4 in a
32-pin 7mm × 5mm DFN package. Please refer to the
LTC4381 data sheet for details on its operation and elec-
trical specifications.
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or I ratings but also on
DS(ON) D(max)
D1, C1, R1, D2 – V
The LTC4381 V
Power is applied from the input to the V
a 10kΩ resistor (R1), filtered by a 0.1µF capacitor (C1A)
and clamped by D1 to 56V. In DC2713A-C/DC2713A-D,
D1 sets the output clamp voltage to 56V + 10.5V = 66.5V.
The optional C1B capacitor can be used as a holdup reser-
voir in cold crank applications where the input voltage is
expected to fall below 8V. In DC2713A-C/DC2713A-D, D2
prevents internal MOSFET avalanche during >100V spikes
, and
CC
generated on MOSFET turn off by a long supply cable. D2
(and snubber) can be omitted for short cables or replaced
with a capacitor if hot plug is not needed.
DLED – Output Voltage Indicator
A green LED indicates the presence of output voltage.
If the LTC4381 faults off, DLED extinguishes. RLED is
chosen so that the brightness will fluctuate with changes
in output voltage, from relatively dim at 8V to very bright
at 60V. The LTC4381's operating quiescent current (I
6µA at 12V input; remove RLED or subtract DLED current
to measure I .
Q
JP1 – Jumper to Select Clamp Voltage
JP1 sets the state of the SEL pin for DC2713A-A/
DC2713A-B. SEL grounded corresponds to an output
clamp of 28.5V; SEL tied to OUT selects an output clamp
of 47V. In DC2713A-C/DC2713A-D, JP1 can be set to
any position; the SEL pin has no effect and clamping is
dictated by the 56V breakdown voltage of D1, i.e., output
clamp = 56V + 10.5V = 66.5V.
Optional Component Pads
Some components are provided with extra unstuffed
pads (C1B, CTMR2, D2, D3) to try out different values
and sizes or other circuits from the LTC4381 data sheet.
For instance, each RSNS, CTMR1, and CTMR2 footprint
accommodates 0805 or 1206 size components; C1A
and C1B footprints accommodate 0805, 1206, or 1210
sizes. D3 is an external GATE-to-OUT clamp, that may be
required in some 48V applications to protect the GATE pin
against discharge of C2 during output short circuit events
(e.g., where C2 ≥ 100nF).
Clamp
CC
pin's absolute maximum voltage is 80V.
CC
pin through
CC
) is
Q
Rev. 0