Icom IC-551D Instruction Manual page 48

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. CPU MALFUNCTION-PREVENT CIRCUIT
This circuit is to prevent the CPU from malfunctioning which may be caused by repeatedly turning
the power ON and OFF, or by chattering when the power connector is plugged. The cause of this
malfunction is that C7 starts recharging before it discharges completely and the CPU is not
initialized. To prevent this, O4 is turned ON and C7 is shorted when the power is OFF.
D/A (DIGITAL TO ANALOG) CONVERTER CIRCUIT
The signals from А1-- D2 of 1С10 are supplied to R87 ~ R95 for D/A conversion through R82.
This D/A converted voltage is fed to the PLL unit and changes in steps to give 100Hz step variation
to the VXO frequency.
RIT. CONTROL CIRCUIT
The RIT circuit in the unit is turned ON and OFF by operation of the RIT switch. When the RIT
is ON, it may also be turned OFF by rotating the tuning control knob. When the RIT is switched
ON, a pulse signal is generated and fed to the Schmitt trigger circuit which consists of two inverters
of IC17 and R56. Any chatter is absorbed by R58 and C24. The square pulse achieved by this
circuit is fed to flip-flop 1С16. Then 1С16 puts out an H-level signal at its Pin 1 which is fed to Pin
9 of 1C17. Pin 8 of 1С17 is H-level in the receive mode and Pin 10 is switched to the L-level, which
turns OFF Q13 and Q14 in the PLL unit so that the VXO frequency can be adjusted with the RIT
control. When the tuning control knob is rotated, a clock pulse signal through R53 resets the flip-
flop 1С16 and turns OFF the RIT.
When the unit is switched to the transmit mode while the RIT is ON, Ріп 8 of 1С17 becomes
L-level and Pin 10 becomes H-level, so that Q13 and 014 in the PLL unit are turned ON. In the
receive mode, 013 and 014 are turned OFF and the receiving frequency goes back t to the previous
frequency with the RIT ON.
RIT CONTROL CIRCUIT | ТІМІМС СНАВТ
SCHEMATIC DIAGRAM
Power RITSW RITSW RITSW ы THER
ом ом Push down Push down Push down Transmit Tuning Knob
RECEIV/TRANSMIT O
SWITCH
RANSMIT
to PLL unit
{RIT 1с) RECEIVE RECEIVE
RIT SWITCH
($ INPUT
Clock LED
Pulse
©
CPU (5) |
РІМ9 012 "e Шан ей
та RIT LED
(7) ОЕЕ ом OFF | ON | OFF] ON OFF
& VARIABLE VARIABLE — VARIABLE vxo
Ё
FREQUENCY
(9) FIXED FIXED FIXED
FIXED
SCAN CLOCK GENERATOR AND CONTROL CIRCUIT
This circuit consists of a monostable multivibrator of 1/4 1C17 and 1/4 1212, a flip-flop of 1/2 1C16,
a sampling gate of 1/4 ІС5 and Об. The circuit samples the scan clock which is fed to Pin 9 of IC5 _
with the pulse signals from R5 of the CPU, and the sampled signals аге fed to the K2 terminals of
the CPU. In the Memory Scan (MS) mode, the output signals from the R3 terminal are charged by