Video Chipset Controller - NEC Versa 550 Series Service Manual

3-8 Hardware Functional Overview

Video Chipset Controller

The 65545 achieves superior performance through direct connection to system processor
buses up to 32-bits in width. When combined with CHIPS' advanced linear acceleration
software driver technology, this device exhibits exceptional performance compared with de-
vices of similar architecture. The 65545 also adds a sophisticated 32-bit graphics hardware
engine for Bit Block Transfer (BITBLT), line drawing, hardware cursor, and other func-
tions intensively used in Graphical User Interface (GUIs) such as Microsoft Windows.
Features Summary:
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Highly integrated design (flat panel/CRT VGA controller, RAMDAC, clock syn-
thesizer)
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Multiple Bus Architecture Integrated Interface
Local Bus (32-bit CPU Direct and VL)
EISA/ISA (PC/AT) Bus
PCI Bus
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Flexible display memory configurations
Two 256Kx16 DRAMs (1MB)
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Integrated programmable linear address feature accelerates GUI performance
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Hardware windows acceleration (65545)
32-bit graphics engine
System-to-screen and screen-to-screen BitBlt
3 operand ROP's
Color expansion
Optimized for Windows BitBlt format
Hardware line drawing
64x64x2 hardware cursor
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High performance resulting from zero wait-state writes (write buffer) and mini-
mum wait-state reads (internal asynchronous FIFO design)
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Supports panel resolutions up to 800x600
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Supports non-interlaced CRT monitors with resolutions up to 1024x768 at 256
colors