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VIDEO SUBSYSTEM
The video subsystem, implemented on the system board and on the LCD Panel, controls the
display output to both the LED Panel and to the external VGA port.
The video subsystem utilizes the C&T 65548 High Performance Flat Panel / CRT VGA
Controller. It also includes 1MB DRAM memory, 32-bit DRAM bus, and separate display
and memory clocks. An additional frame buffer/accelerator DRAM increases the available
memory bandwidth for CPU accesses.
Video Chipset Controller
The C&T 65548 initiates a family of 208-pin, high performance for the full-featured note-
book that requires the highest graphics performance available. The 65548 achieves superior
performance through direct connection to system processor buses up to 32-bits in width.
When combined with the CHIPS' advanced linear acceleration software driver technology,
this device exhibits exceptional performance compared with devices of similar architecture.
The 65548 also adds a sophisticated 32-bit graphics hardware engine for the Bit Block
Transfer (BITBLT), line drawing, hardware cursor, and other functions intensively used in
Graphical User Interface (GUIs) such as Microsoft Windows.
Features Summary:
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Highly integrated design (flat panel/CRT VGA controller, RAMDAC, clock syn-
thesizer)
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Multiple Bus Architecture Integrated Interface
Local Bus (32-bit CPU Direct and VL)
EISA/ISA (PC/AT) Bus
PCI Bus
Flexible display memory configurations
Two 256Kx16 DRAMs (1MB)
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Integrated programmable linear address feature accelerates GUI performance
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Hardware windows acceleration (65548)
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32-bit graphics engine
System-to-screen and screen-to-screen BitBlt
3 operand ROP's
Color expansion
Optimized for Windows BitBlt format
Hardware Functional Overview
3-7
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Troubleshooting
