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Summary of Contents for National Instruments PXIe-6614
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NI PXIe-6614 PXI Counter/Timer Module Limited Availability New From Surplus Stock Open Web Page https://www.artisantg.com/95276-2 A l l t r a d e m a r k s , b r a n d n a m e s , a n d b r a n d s a p p e a r i n g h e r e i n a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s .
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NI 6612 User Manual NI 6612 User Manual November 2013 374008B-01 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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11500 North Mopac Expressway Austin, Texas 78759-3504 USA Tel: 512 683 0100 For further support information, refer to the Technical Support and Professional Services appendix. To comment on National Instruments documentation, refer to the National Instruments Web site at and enter the Info Code ni.com/info...
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Any action against National Instruments must be brought within one year after the cause of action accrues. National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control.
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™ The ExpressCard word mark and logos are owned by PCMCIA and any use of such marks by National Instruments is under license. The mark LabWindows is used under a license from Microsoft Corporation. Windows is a registered trademark of Microsoft Corporation in the United States and other countries.
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Furthermore, any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
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Contents DO Pause Trigger Signal ..................2-15 Using a Digital Pause Trigger................2-15 Routing DO Pause Trigger Signal to an Output Terminal........ 2-15 I/O Protection........................2-16 DI Change Detection ......................2-16 DI Change Detection Applications ................2-17 Digital Filtering......................... 2-17 Connecting Digital I/O Signals..................
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NI-DAQmx concepts, and common applications that are applicable to all programming environments. NI-DAQmx is the software you use to communicate with and control your DAQ device. Select Start»All Programs»National Instruments»NI-DAQ»NI-DAQmx Help. • Measurement & Automation Explorer Help—Contains information about configuring and testing supported NI devices using Measurement &...
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Chapter 1 Introduction Table 1-1 provides a list of accessories and cables available for use with the NI 6612. Table 1-1. Accessories and Cables Accessory Description SH68-68-D1 Shielded 68-conductor cable R6868 Unshielded 68-conductor flat ribbon cable BNC-2121 BNC connector block with built-in test features CA-1000 Configurable connector accessory SCB-68A...
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Chapter 2 Digital I/O Figures 2-1 and 2-2 show the circuitry of a DIO line on Port 0 and Port 1 respectively. Each DIO line is similar. Figure 2-1. Digital I/O Circuitry on Port 0 DO Waveform Generation FIFO DO Sample Clock Static DO Buffer I/O Protection...
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Chapter 2 Digital I/O Hardware-timed operations can be buffered or hardware-timed single point. A buffer is a temporary storage in computer memory for to-be-transferred samples. • Buffered—Data is moved from the DAQ device’s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory.
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Chapter 2 Digital I/O Device Routes tab in MAX. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. If the NI 6612 receives a DI Sample Clock when the FIFO is full, it reports an overflow error to the host software.
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Chapter 2 Digital I/O Using a Digital Source To use DI Start Trigger with a digital source, specify a source and an edge. You can route many signals to DI Start Trigger. To view the complete list of possible routes, see the Device Routes tab in MAX.
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Chapter 2 Digital I/O Figure 2-7. Halt (Internal Clock) and Free Running (External Clock) T – A DI Sample Clock DI Pause Trigger Halt. Used on Internal Clock DI External Sample Clock DI Sample Clock DI Pause Trigger Free Running. Used on External Clock Using a Digital Source To use DI Pause Trigger, specify a source and a polarity.
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Chapter 2 Digital I/O • With FIFO regeneration, the entire buffer is downloaded to the FIFO and regenerated from there. After the data is downloaded, new data cannot be written to the FIFO. To use FIFO regeneration, the entire buffer must fit within the FIFO size.
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Chapter 2 Digital I/O You might use DO Sample Clock Timebase if you want to use an external sample clock signal, but need to divide the signal down. If you want to use an external sample clock signal but do not need to divide the signal, then you should use DO Sample Clock rather than DO Sample Clock Timebase.
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Chapter 2 Digital I/O I/O Protection Each DIO and PFI signal has limited protection against overvoltage, undervoltage, and overcurrent conditions as well as ESD events. Avoid these fault conditions by following these guidelines: • When configuring a PFI or DIO line as an output, do not connect it to any external signal source, ground, or power supply.
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Chapter 2 Digital I/O Figure 2-16 illustrates the difference between line and bus filtering. Figure 2-16. Line and Bus Filtering Digital Input P0.A Digital Input P0.B Filter Clock Filtered Input A Filtered Input B 2A With line filtering, filtered input A would ignore the glitch on digital input P0.B and transition after two filter clocks.
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Chapter 2 Digital I/O To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C examples, refer to the KnowledgeBase document, Where Can I Find NI-DAQmx Examples?, by going to and entering the Info Code ni.com/info daqmxexp For additional examples, refer to zone.ni.com Signal Integrity Considerations Refer to the...
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Chapter 3 Counters counter sample clock. You can route an external signal or one of many different internal signals as the sample clock. For example, you can generate a signal using one counter and route that signal to the sample clock of another counter. Refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information about which signals can be used as the source.
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Chapter 3 Counters On each sample clock, the device stores the current count value in a buffer. Use DAQmx Read to read the values from this buffer. Figure 3-4 shows an example using Sample Clock Timing. Figure 3-4. Edge Counting: Sample Clock Timing Start Task Signal to Measure Count...
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Chapter 3 Counters Other Settings You can filter noise on any PFI signal that is an input to the counter by enabling a filter. Refer to the PFI Filters section in Chapter 4, PFI, for more information. If you route the same PFI signal to multiple destinations, you should enable the Synchronization feature.
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Chapter 3 Counters • To specify on which edge, rising or falling, to begin the measurement, select the appropriate property from the following list that corresponds to the type of channel created, and then set this property to rising or falling. –...
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Chapter 3 Counters Other Settings The counter measures the pulse using the Counter Timebase signal. By default, the counter uses an onboard 100 MHz signal as the timebase. To change the timebase, use the CI.CtrTimebaseSrc DAQmx Channel property. You can filter noise on any PFI signal that is an input to the counter by enabling a filter. Refer to the PFI Filters section in Chapter 4, PFI, for more information.
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Chapter 3 Counters Figure 3-14. Frequency Measurement Using Periods measurement duration = 3 periods Signal to Measure Counter Timebase (100 MHz) Count Trade-offs Consider the following trade-offs when determining the method of measuring frequency: • Accuracy vs. Update Rate Increasing measurement duration increases the accuracy of the measurement. Decreasing measurement duration allows the counter to update the measurement more often.
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Chapter 3 Counters • CI.CtrTimebase.Src—To change the signal used as the counter timebase, set this property to a different terminal. Sample Clock (without Averaging) With this method, for each sample clock the counter detects the last full period of the signal-to-measure that occurs before the sample clock.
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Chapter 3 Counters Large Range with 2 Counters This measurement method requires two counters: Counter N and Counter M. For this measurement method, Counter N creates a pulse equal to T1 periods of the signal-to-measure. The device routes this pulse to Counter M. Counter M measures the duration of this pulse by counting the number of cycles (T2) of the timebase.
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Chapter 3 Counters Figure 3-19. Frequency Measurement: High Frequency with Two Counters Counter Pulse Source Timebase (f ) k Counter M Source Counter N Signal to Gate Measure Pulse … Signal to Measure (f ) With the known measurement time (T), which can be configured in CI.Freq.MeasTime, the maximum error and maximum frequency error for this method are given by: ×...
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Chapter 3 Counters Channel Settings By default, the counter: • measures pulses on a default PFI terminal. Refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information. • measures a high pulse. That is, the counter begins measuring the time from a rising edge to the next falling edge.
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Chapter 3 Counters Figure 3-23 shows an example of a Pulse-Width measurement using an Arm Start Trigger. Note that if the counter is armed while the signal-to-measure is already in the active state, the counter will wait to perform the measurement on the next full pulse after the Arm Start Trigger. Figure 3-23.
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Chapter 3 Counters Figure 3-25. Two-Edge Separation Measurement: Implicit Timing First Signal Second Signal Counter Timebase Counter Value Buffer To use Implicit timing, use the DAQmx Timing (Implicit) VI or function. Sample Clock With Sample Clock timing, on each active edge of the sample clock, the device stores one measurement.
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Chapter 3 Counters Figure 3-29. X4 Encoding Ch A Ch B Counter Value Channel Z Behavior Some quadrature encoders have a third channel, channel Z, which is also referred to as the index channel. A high level on channel Z causes the counter to be reloaded with a specified value in a specified phase of the quadrature cycle.
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Chapter 3 Counters Timing Settings The timing settings determine when the device reads the encoder. On-Demand By default, the counter uses On-Demand (no sample clock) timing. The counter starts counting when software calls DAQmx Start Task. Each time software calls DAQmx Read, the NI 6612 returns the current angle of the encoder.
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Chapter 3 Counters Figure 3-34. Samples of Counter Output Applications A: Output B: Output C: Output Series of pulses Periodic waveform Complex waveform or timing pattern Generating a Series of One or More Pulses The NI 6612 can generate a series of one or more pulses, where each pulse is the same duration. Create Channel You specify the characteristics of the pulses when you create the channel.
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Chapter 3 Counters • Start.Retriggerable—Enables a retriggerable generation. After the NI 6612 generates a series of pulses, it monitors the Start Trigger input. When the NI 6612 receives another Start Trigger, it generates the same series of pulses again. Figure 3-37 shows an example of retriggerable generation.
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Chapter 3 Counters Generating a Waveform with Variable Frequency and Duty Cycle Figure 3-40 shows an example of a waveform with variable frequency and duty cycle. Figure 3-40. Waveform with Variable Frequency and Duty Cycle Sample 1 Sample 2 Initial Frequency, (Frequency 1, (Frequency 2, Duty Cycle...
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Chapter 3 Counters Generating Complex Digital Waveform or Timing Pattern A complex digital waveform or timing patterns consists of a series of pulses. Each pulse consists of an idle time and active time. To specify the waveform, create a buffer with multiple points. Each point consists of the idle time and active time of one pulse of the waveform.
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Chapter 3 Counters Frequency Generator To generate a square wave of a fixed frequency you can use a counter to create a continuous pulse train. Refer to the Generating a Waveform with Constant Frequency and Duty Cycle section for more information. In addition to the eight counters, the NI 6612 has a dedicated Frequency Generator circuit.
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Chapter 4 Using PFI Terminals as Timing Input Signals Use PFI terminals to route external timing signals to many different functions. Each PFI terminal can be routed to any of the following signals: • Counter input signals for all counters—Source, Gate, Aux, HW_Arm, A, B, Z •...
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Chapter 4 The following is an example of low to high transitions of the input signal. High-to-low transitions work similarly. Assume that an input terminal has been low for a long time. The input terminal then changes from low to high, but glitches several times. When the filter clock has sampled the signal high on N consecutive edges, the low to high transition is propagated to the rest of the circuit.
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Chapter 4 Figure 4-5. Twisted-Pair Wiring 68-Pin Screw Terminal Accessory Output of External Device PFI 39 Pin 2 Pin 36 The NI 6612 has 40 PFI pins. Each PFI pin is paired with a particular GND pin. The SH68-68-D1 cable twists each PFI pin with its corresponding GND pin. Table 4-2 shows the corresponding GND pin for each PFI pin.
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Chapter 5 Counter Signal Routing and Clock Generation 100 MHz Timebase The 100 MHz Timebase can be used as the timebase for all internal subsystems. The 100 MHz Timebase is generated from one of the following sources: • Onboard oscillator. •...
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NI 6612 in Measurement & Automation Explorer (MAX). To view this table: Launch Measurement & Automation Explorer (MAX) by navigating to Start» All Programs»National Instruments»Measurement & Automation Explorer, or by clicking Measurement & Automation Explorer from NI Launcher. (Windows 8) Expand My System»Devices and Interfaces in the configuration tree on the left to view...
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Chapter 5 Counter Signal Routing and Clock Generation Table 5-3. Matching Routing Terminology (Continued) NI-DAQmx Property Counter Input Signal CI.Freq.Term Low Frequency with 1 Counter or when CtrnGate using Sample Clock Large Range with Two Counter or CtrnSource High Frequency with Two Counters CI.Pulse.Freq.Term CtrnGate CI.Pulse.Ticks.Term...
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• Share trigger signals between devices Many National Instruments DAQ, motion, vision, and CAN devices support RTSI. In a PCI Express system, the RTSI bus consists of the RTSI bus interface and a ribbon cable. The bus can route timing and trigger signals between several functions on as many as five DAQ, vision, motion, or CAN devices in the computer.
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Chapter 5 Counter Signal Routing and Clock Generation Table 5-4. RTSI Signals (Continued) RTSI Bus Signal Terminal RTSI 3 RTSI 2 RTSI 1 RTSI 0 Not Connected. Do not connect signals to 1 to 18 these terminals. D GND 19, 21, 23, 25, 27, 29, 31, 33 Using RTSI as Outputs RTSI <0..7>...
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Chapter 5 Counter Signal Routing and Clock Generation PXIe-DSTAR<A..C> PXI Express devices can provide high-quality and high-frequency point-to-point connections between each slot and a system timing slot. These connections come in the form of three low-voltage differential star triggers that create point-to-point, high-frequency connections between a PXI Express system timing module and a peripheral device.
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Chapter 6 Bus Interface Each DMA controller supports several features to optimize PCI Express and PXI Express bus utilization. The DMA controllers pack and unpack data through the FIFOs. The DMA controllers also automatically handle unaligned memory buffers on PXI Express. •...
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Appendix A Pinout and Signal Descriptions Figure A-1. NI 6612 Pinout 34 68 PFI 31/P0.31/CTR 2 SOURCE D GND 33 67 D GND PFI 30/P0.30/CTR 2 GATE 32 66 PFI 28/P0.28/CTR 2 OUT PFI 29/P0.29/CTR 2 AUX 31 65 PFI 27/P0.27/CTR 3 SOURCE D GND 30 64 D GND...
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You can also register for instructor-led, hands-on courses at locations around the world. • System Integration—If you have time constraints, limited in-house technical resources, or other project challenges, National Instruments Alliance Partner members can help. To learn more, call your local NI office or visit ni.com/alliance •...
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Appendix B Technical Support and Professional Services You also can visit the Worldwide Offices section of to access the branch ni.com/niglobal office Web sites, which provide up-to-date contact information, support phone numbers, email addresses, and current events. B-2 | ni.com Artisan Technology Group - Quality Instrumentation ...
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