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NI 6612 User Manual NI 6612 User Manual November 2013 374008B-01...
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11500 North Mopac Expressway Austin, Texas 78759-3504 USA Tel: 512 683 0100 For further support information, refer to the Technical Support and Professional Services appendix. To comment on National Instruments documentation, refer to the National Instruments Web site at and enter the Info Code ni.com/info...
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Any action against National Instruments must be brought within one year after the cause of action accrues. National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control.
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™ The ExpressCard word mark and logos are owned by PCMCIA and any use of such marks by National Instruments is under license. The mark LabWindows is used under a license from Microsoft Corporation. Windows is a registered trademark of Microsoft Corporation in the United States and other countries.
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Furthermore, any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
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Contents DO Pause Trigger Signal ..................2-15 Using a Digital Pause Trigger................2-15 Routing DO Pause Trigger Signal to an Output Terminal........ 2-15 I/O Protection........................2-16 DI Change Detection ......................2-16 DI Change Detection Applications ................2-17 Digital Filtering......................... 2-17 Connecting Digital I/O Signals..................
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NI 6612 User Manual Quadrature and Two-Pulse Encoder Overview ............3-25 Quadrature Encoders ..................3-25 Two-Pulse Encoders ..................3-27 Angular Position Measurement ................3-27 Create Channel ....................3-27 Channel Settings ....................3-27 Timing Settings....................3-28 Trigger Settings ....................3-29 Other Settings ....................3-29 Linear Position Measurement...................
About This Manual This manual describes the electrical and mechanical aspects of the NI 6612 devices, and contains information about device operation and programming. Related Documentation The following documents contain information that you may find helpful as you read this manual: •...
If you have not already installed the device, refer to the DAQ Getting Started documents. The NI 6612 is a timing and digital I/O device that offers eight 32-bit counter channels and up to 32 lines of individually configurable, TTL/CMOS-compatible digital I/O.
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Chapter 1 Introduction Table 1-1 provides a list of accessories and cables available for use with the NI 6612. Table 1-1. Accessories and Cables Accessory Description SH68-68-D1 Shielded 68-conductor cable R6868 Unshielded 68-conductor flat ribbon cable BNC-2121 BNC connector block with built-in test features...
Digital I/O The NI 6612 contains 40 Programmable Function Interface (PFI) signals. These PFI signals can function as either timing input, timing output, or DIO signals. This chapter describes the DIO functionality. Refer to Chapter 4, PFI, for information on using the PFI lines as timing input or output signals.
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Table 2-2 lists the lines that do not populate CI. You must use the lines in Table 2-2 when measuring inputs frequencies above 25 MHz. For more information, refer to the NI 6612 Specifications.
Chapter 2 Digital I/O Hardware-timed operations can be buffered or hardware-timed single point. A buffer is a temporary storage in computer memory for to-be-transferred samples. • Buffered—Data is moved from the DAQ device’s onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory.
You can acquire digital waveforms on the Port 0 DIO lines. The DI waveform acquisition FIFO stores the digital samples. The NI 6612 has a DMA controller dedicated to moving data from the DI waveform acquisition FIFO to system memory. The device samples the DIO lines on each rising or falling edge of a clock signal, DI Sample Clock.
Device Routes tab in MAX. Refer to Device Routing in MAX in the NI-DAQmx Help or the LabVIEW Help for more information. If the NI 6612 receives a DI Sample Clock when the FIFO is full, it reports an overflow error to the host software.
NI 6612 User Manual polarity selection for DI Sample Clock Timebase can be configured as either rising—or falling—edge except for the 100 MHz Timebase or 20 MHz Timebase. The DI Sample Clock Timebase may be used if an external sample clock signal is required, but the signal needs to be divided down.
Chapter 2 Digital I/O Using a Digital Source To use DI Start Trigger with a digital source, specify a source and an edge. You can route many signals to DI Start Trigger. To view the complete list of possible routes, see the Device Routes tab in MAX.
NI 6612 User Manual When the reference trigger occurs, the device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired. Figure 2-6 shows the final buffer. Figure 2-6. Reference Trigger Final Buffer...
Chapter 2 Digital I/O Figure 2-7. Halt (Internal Clock) and Free Running (External Clock) T – A DI Sample Clock DI Pause Trigger Halt. Used on Internal Clock DI External Sample Clock DI Sample Clock DI Pause Trigger Free Running. Used on External Clock Using a Digital Source To use DI Pause Trigger, specify a source and a polarity.
NI 6612 User Manual Hardware-Timed Generations With a hardware-timed generation, a digital hardware signal controls the rate of the generation. This signal can be generated internally on your device or provided externally. Hardware-timed generations have several advantages over software-timed generations: •...
Digital waveforms can be generated on the Port 0 DIO lines. The DO waveform generation FIFO stores the digital samples. NI 6612 has a DMA controller dedicated to moving data from the system memory to the DO waveform generation FIFO. The device moves samples from the FIFO to the DIO terminals on each rising—or falling—edge of a clock signal, DO Sample...
The DO Sample Clock Timebase (do/SampleClockTimebase) signal is divided down to provide a source for DO Sample Clock. By default, the NI 6612 routes the onboard 100 MHz timebase to the DO Sample Clock Timebase. You can route many signals to DO Sample Clock Timebase.
Chapter 2 Digital I/O You might use DO Sample Clock Timebase if you want to use an external sample clock signal, but need to divide the signal down. If you want to use an external sample clock signal but do not need to divide the signal, then you should use DO Sample Clock rather than DO Sample Clock Timebase.
NI 6612 User Manual DO Pause Trigger Signal Use the DO Pause Trigger (do/PauseTrigger) signal to mask off samples in a DAQ sequence. That is, when DO Pause Trigger is active, no samples occur. DO Pause Trigger does not stop a sample that is in progress. The pause does not take effect until the beginning of the next sample.
Chapter 2 Digital I/O I/O Protection Each DIO and PFI signal has limited protection against overvoltage, undervoltage, and overcurrent conditions as well as ESD events. Avoid these fault conditions by following these guidelines: • When configuring a PFI or DIO line as an output, do not connect it to any external signal source, ground, or power supply.
NI 6612 User Manual The DIO change detection circuitry can be enabled to detect rising edges, falling edges, or either edge individually on each DIO line. The device synchronizes each DI signal to the 100 MHz Timebase, and then sends the signal to the change detectors. The circuitry ORs the output of all enabled change detectors from every DI signal.
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Chapter 2 Digital I/O Table 2-3. Filters Pulse Width Pulse Width Guaranteed to Guaranteed to Not Filter Settings Filter Clocks Pass Filter Pass Filter Short 12.5 MHz 160 ns 80 ns Medium 195/3125 kHz 10.24 μs 5.12 μs High 390.625 Hz 5.12 ms 2.56 ms None...
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NI 6612 User Manual The behavior for each transition can be thought of as a state machine. If a line transitions and stays high for two consecutive filter clock edges, then one of two options occurs: • Case 1—If no transitions have occurred on the other lines, the transition propagates on the second filtered clock edge, as shown in Figure 2-14.
Chapter 2 Digital I/O Figure 2-16 illustrates the difference between line and bus filtering. Figure 2-16. Line and Bus Filtering Digital Input P0.A Digital Input P0.B Filter Clock Filtered Input A Filtered Input B 2A With line filtering, filtered input A would ignore the glitch on digital input P0.B and transition after two filter clocks.
Exceeding the maximum input voltage ratings, which are listed in the Caution specifications document for each NI 6612 device, can damage the device and the computer. NI is not liable for any damage resulting from such signal connections. Getting Started with DIO Applications in...
Chapter 2 Digital I/O To locate LabVIEW, LabWindows/CVI, Measurement Studio, Visual Basic, and ANSI C examples, refer to the KnowledgeBase document, Where Can I Find NI-DAQmx Examples?, by going to and entering the Info Code ni.com/info daqmxexp For additional examples, refer to zone.ni.com Signal Integrity Considerations Refer to the...
For example, you can configure the counter to take a measurement on each edge of a sample clock. For measurements using a sample clock, you must configure the NI 6612 to route a signal to the sample clock input of the counter. The NI 6612 does not have a dedicated circuit to generate a...
Chapter 3 Counters counter sample clock. You can route an external signal or one of many different internal signals as the sample clock. For example, you can generate a signal using one counter and route that signal to the sample clock of another counter. Refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information about which signals can be used as the source.
NI 6612 User Manual • CI.CountEdges.ActiveEdge—To specify on which edge, whether rising or falling, to increment or decrement the counter. • CI.CountEdges.Dir—To set whether to increment or decrement the counter on each edge. You can set this property to: –...
Chapter 3 Counters On each sample clock, the device stores the current count value in a buffer. Use DAQmx Read to read the values from this buffer. Figure 3-4 shows an example using Sample Clock Timing. Figure 3-4. Edge Counting: Sample Clock Timing Start Task Signal to Measure Count...
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NI 6612 User Manual Using a Pause Trigger To configure the counter to pause counting based on a hardware signal, use a Pause Trigger. Set Pause.TrigType to Digital Level. Set Pause.DigLvl.Src to select what signal to use as the Pause Trigger.
Chapter 3 Counters Other Settings You can filter noise on any PFI signal that is an input to the counter by enabling a filter. Refer to the PFI Filters section in Chapter 4, PFI, for more information. If you route the same PFI signal to multiple destinations, you should enable the Synchronization feature.
NI 6612 User Manual Figure 3-8. Pulse Measurement DAQmx DAQmx Start Task Read Read Pulse Pulse Pulse Pulse High High Signal to Measure Counter Timebase Count Buffer Read Value Create Channel To make a Pulse measurement, first create a virtual channel. Use one of following three VIs or functions depending on the type of data you want DAQmx to return: •...
Chapter 3 Counters • To specify on which edge, rising or falling, to begin the measurement, select the appropriate property from the following list that corresponds to the type of channel created, and then set this property to rising or falling. –...
NI 6612 User Manual Sample Clock With Sample Clock timing, on each active edge of the sample clock, the device stores one measurement. The one measurement is the high and low pulse times of the most recent full pulse to occur before the sample clock. Figure 3-10 shows an example using Sample Clock timing.
Chapter 3 Counters Other Settings The counter measures the pulse using the Counter Timebase signal. By default, the counter uses an onboard 100 MHz signal as the timebase. To change the timebase, use the CI.CtrTimebaseSrc DAQmx Channel property. You can filter noise on any PFI signal that is an input to the counter by enabling a filter. Refer to the PFI Filters section in Chapter 4, PFI, for more information.
NI 6612 User Manual Frequency Measurement Frequency Measurement Considerations The NI 6612 supports five methods for measuring frequency. Table 3-1 summarizes the five frequency measurement methods. Table 3-1. Frequency Measurement Methods Number Measurement Method Timing Counters Duration Sample Clock (with Averaging)
• Number of Counters Some methods use two of the eight counters on the NI 6612; other methods use one of the eight counters. Frequency Measurement Methods This section describes the frequency measurement methods supported by the NI 6612.
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NI 6612 User Manual Figure 3-15. Frequency Measurement: Sample Clock with Averaging DAQmx Start Task Sample 1 Sample 2 Sample 3 Signal to Measure (f ) Counter Timebase (f ) Sample Clock (f ) T1 T2 T1 T2 T1 T2...
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Chapter 3 Counters • CI.CtrTimebase.Src—To change the signal used as the counter timebase, set this property to a different terminal. Sample Clock (without Averaging) With this method, for each sample clock the counter detects the last full period of the signal-to-measure that occurs before the sample clock.
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NI 6612 User Manual Low Frequency with 1 Counter For this method, the device detects the first full period of the signal-to-measure. The counter measures the duration of this period by counting the number of cycles (T2) of the timebase.
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Chapter 3 Counters Large Range with 2 Counters This measurement method requires two counters: Counter N and Counter M. For this measurement method, Counter N creates a pulse equal to T1 periods of the signal-to-measure. The device routes this pulse to Counter M. Counter M measures the duration of this pulse by counting the number of cycles (T2) of the timebase.
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NI 6612 User Manual To use the Large Range with 2 Counters method, configure the following: • DAQmx Create channel (CI-Frequency)—Use this VI or function to create the channel. • CI.Freq.MeasMeth—Set this property to Large Range with 2 Counters. Note that this measurement method requires two counters: •...
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Chapter 3 Counters Figure 3-19. Frequency Measurement: High Frequency with Two Counters Counter Pulse Source Timebase (f ) k Counter M Source Counter N Signal to Gate Measure Pulse … Signal to Measure (f ) With the known measurement time (T), which can be configured in CI.Freq.MeasTime, the maximum error and maximum frequency error for this method are given by: ×...
NI 6612 User Manual By default, the counters measure the frequency on a default PFI terminal (refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information) and use an onboard 100 MHz clock as the timebase. To change the signals used for this measurement, configure the following: •...
Chapter 3 Counters Channel Settings By default, the counter: • measures pulses on a default PFI terminal. Refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information. • measures a high pulse. That is, the counter begins measuring the time from a rising edge to the next falling edge.
NI 6612 User Manual Implicit With Implicit timing, the device measures the time of every pulse on the signal-to-measure. The measurements are stored in a buffer. Each call to DAQmx Read returns values from this buffer. Figure 3-21 shows an example of Implicit timing.
Chapter 3 Counters Figure 3-23 shows an example of a Pulse-Width measurement using an Arm Start Trigger. Note that if the counter is armed while the signal-to-measure is already in the active state, the counter will wait to perform the measurement on the next full pulse after the Arm Start Trigger. Figure 3-23.
NI 6612 User Manual Channel Settings By default, the counter: • monitors for events on default PFI terminals. Refer to Chapter 5, Counter Signal Routing and Clock Generation, for more information. • looks for rising edges on the first signal and second signal.
Chapter 3 Counters Figure 3-25. Two-Edge Separation Measurement: Implicit Timing First Signal Second Signal Counter Timebase Counter Value Buffer To use Implicit timing, use the DAQmx Timing (Implicit) VI or function. Sample Clock With Sample Clock timing, on each active edge of the sample clock, the device stores one measurement.
If you route the same PFI signal to multiple destinations, you should enable the Synchronization feature. Refer to Chapter 4, PFI, for more information. Quadrature and Two-Pulse Encoder Overview The NI 6612 can make angular and linear position measurements using quadrature and two-pulse encoders. Quadrature Encoders A quadrature encoder can have up to three channels: channels A, B, and Z.
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Chapter 3 Counters Figure 3-29. X4 Encoding Ch A Ch B Counter Value Channel Z Behavior Some quadrature encoders have a third channel, channel Z, which is also referred to as the index channel. A high level on channel Z causes the counter to be reloaded with a specified value in a specified phase of the quadrature cycle.
NI 6612 User Manual Two-Pulse Encoders The counter supports two pulse encoders that have two channels: channels A and B. The counter increments on each rising edge of channel A. The counter decrements on each rising edge of channel B, as shown in Figure 3-31.
By default, the counter uses On-Demand (no sample clock) timing. The counter starts counting when software calls DAQmx Start Task. Each time software calls DAQmx Read, the NI 6612 returns the current angle of the encoder. Figure 3-32 shows an example of On-Demand timing.
The settings for linear position measurements are the same as for angular position measurements. Counter Output Applications The NI 6612 can generate a wide variety of digital output signals. Counter output applications include: • Generating a series of one or more pulses.
Complex waveform or timing pattern Generating a Series of One or More Pulses The NI 6612 can generate a series of one or more pulses, where each pulse is the same duration. Create Channel You specify the characteristics of the pulses when you create the channel. You can specify the pulses in terms of time, ticks of the timebase clock, or in terms of frequency and duty cycle.
Hardware Timed Single Point. Triggering Setting By default, the NI 6612 begins generating the pulses when you call the DAQmx Start Task VI or function. The NI 6612 can also begin generating pulses in response to a digital trigger. Figure 3-36 shows an example using a digital trigger.
Start.Retriggerable—Enables a retriggerable generation. After the NI 6612 generates a series of pulses, it monitors the Start Trigger input. When the NI 6612 receives another Start Trigger, it generates the same series of pulses again. Figure 3-37 shows an example of retriggerable generation.
By default, the NI 6612 begins generating the waveform when the DAQmx Start Task VI or function is called. The NI 6612 can also begin generating pulses in response to a digital trigger. Figure 3-39 shows an example where pulses are generated in response to a digital trigger.
The counter begins by generating a waveform with an initial frequency and duty cycle. On the first active edge of sample clock, the NI 6612 reads the first sample out of the buffer. The first sample consists of two values: frequency1 and duty_cycle1. The counter begins generating a waveform with frequency1 and duty_cycle1.
Clock) VI or function. Triggering Settings By default, the NI 6612 begins generating the pulses when you call the DAQmx Start Task VI or function. The NI 6612 can also begin generating pulses in response to a digital trigger. To use a start trigger, call the DAQmx Start Trigger (Digital Edge) VI or function. Inputs to this VI or function include: •...
Chapter 3 Counters Generating Complex Digital Waveform or Timing Pattern A complex digital waveform or timing patterns consists of a series of pulses. Each pulse consists of an idle time and active time. To specify the waveform, create a buffer with multiple points. Each point consists of the idle time and active time of one pulse of the waveform.
For this type of generation use Implicit timing by calling the DAQmx Timing (Implicit) VI or function. Triggering Setting By default, the NI 6612 begins generating the pulses when you call the DAQmx Start Task VI or function. The NI 6612 can also begin generating pulses in response to a digital trigger.
Generating a Waveform with Constant Frequency and Duty Cycle section for more information. In addition to the eight counters, the NI 6612 has a dedicated Frequency Generator circuit. The Frequency Generator circuit is more limited than one of the eight counters. However, it may be useful if all of the counters are dedicated to other tasks.
NI 6612 devices have up to 40 Programmable Function Interface (PFI) signals. Each PFI can be individually configured as the following: • A static digital input • A static digital output • A timing input signal for DI, DO, or counter/timer functions •...
Chapter 4 Using PFI Terminals as Timing Input Signals Use PFI terminals to route external timing signals to many different functions. Each PFI terminal can be routed to any of the following signals: • Counter input signals for all counters—Source, Gate, Aux, HW_Arm, A, B, Z •...
NI 6612 User Manual Using PFI Terminals as Static Digital I/Os Each PFI can be individually configured as a static digital input or a static digital output. When a terminal is used as a static digital input or output, it is called P0.x or P1.x. On the I/O connector, each terminal is labeled PFI x/P0.x or PFI x/P1.x.
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Chapter 4 The following is an example of low to high transitions of the input signal. High-to-low transitions work similarly. Assume that an input terminal has been low for a long time. The input terminal then changes from low to high, but glitches several times. When the filter clock has sampled the signal high on N consecutive edges, the low to high transition is propagated to the rest of the circuit.
75 Ω. When connecting signals to the NI 6612, this impedance needs to be matched as closely as possible. When driving signals into the NI 6612, use a driver with 75 Ω output impedance as shown in Figure 4-4.
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Pin 2 Pin 36 The NI 6612 has 40 PFI pins. Each PFI pin is paired with a particular GND pin. The SH68-68-D1 cable twists each PFI pin with its corresponding GND pin. Table 4-2 shows the corresponding GND pin for each PFI pin. If you are using a 68-pin screw terminal accessory or designing your own accessory, make sure to connect your GND signal to the appropriate GND pin as shown in this table.
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NI 6612 User Manual Table 4-2. Signals and D GND Pin Number on 68-Pin Screw Terminal Accessory (Continued) PFI/DIO Number Pin Number for D GND PFI 16 / P0.16 PFI 17 / P0.17 PFI 18 / P0.18 PFI 19 / P0.19 PFI 20 / P0.20...
Counter Signal Routing and Clock Generation NI 6612 has flexible signal routing features. Signals can be routed to or from the following sources: • User input through the PFI terminals • Any of the eight counters • The digital I/O circuits •...
Chapter 5 Counter Signal Routing and Clock Generation 100 MHz Timebase The 100 MHz Timebase can be used as the timebase for all internal subsystems. The 100 MHz Timebase is generated from one of the following sources: • Onboard oscillator. •...
10 MHz Reference Clock The 10 MHz reference clock can be used to synchronize other devices to your NI 6612 device. The 10 MHz reference clock can be routed to the RTSI <0..7>, PXI_Trigger <0..7> or PFI <0..39>...
Chapter 3, Counters, for more information about changing the signal routed to each counter. To view a complete list of possible routes for each signal, use the Device Routes table for NI 6612 in Measurement & Automation Explorer (MAX). To view this table: Launch Measurement & Automation Explorer (MAX) by navigating to Start»...
Pause Trigger. Synchronizing Multiple Devices Refer to the following sections for information about synchronizing multiple NI 6612 devices. PXI Express Devices On PXI Express systems, you can synchronize devices to PXIe_CLK100. In this application the PXI Express chassis acts as the initiator.
NI 6612 User Manual PCI Express Devices With the RTSI and PFI buses and the routing capabilities of the NI PCIe-6612, there are several ways to synchronize multiple devices depending on your application. To synchronize multiple devices to a common timebase, choose one device—the initiator—to generate the timebase.
RTSI terminals. Note Using RTSI Terminals as Timing Input Signals You can use RTSI terminals to route external timing signals to many different NI 6612 functions. Each RTSI terminal can be routed to any of the following signals: •...
In a PXI chassis with more than eight slots, PXI trigger lines may be divided into multiple independent buses. PXI_Trigger<0..7> are bidirectional signals. PXI_STAR The NI 6612 device receives the PXI_STAR signal from a Star Trigger controller in a different slot of the PXI Chassis. Refer to the PXI Express Specification at for more www.pxisa.org information.
Chapter 5 Counter Signal Routing and Clock Generation PXIe-DSTAR<A..C> PXI Express devices can provide high-quality and high-frequency point-to-point connections between each slot and a system timing slot. These connections come in the form of three low-voltage differential star triggers that create point-to-point, high-frequency connections between a PXI Express system timing module and a peripheral device.
Bus Interface The bus interface circuitry of NI 6612 efficiently moves data between host memory and the measurement and acquisition circuits. Data Transfer Methods Refer to the following sections for information about bus interface data transfer methods for devices. PCI Express/PXI Express Device Data Transfer...
Programmed I/O is typically used in software-timed (on-demand) operations. PXI Express Considerations PXI Express Clock and Trigger Signals Refer to the PXI Trigger Signals (NI PXIe-6612 Only) section of Chapter 5, Counter Signal Routing and Clock Generation, for more information about PXI and PXI Express clock and trigger signals.
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Appendix A Pinout and Signal Descriptions Figure A-1. NI 6612 Pinout 34 68 PFI 31/P0.31/CTR 2 SOURCE D GND 33 67 D GND PFI 30/P0.30/CTR 2 GATE 32 66 PFI 28/P0.28/CTR 2 OUT PFI 29/P0.29/CTR 2 AUX 31 65 PFI 27/P0.27/CTR 3 SOURCE...
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You can also register for instructor-led, hands-on courses at locations around the world. • System Integration—If you have time constraints, limited in-house technical resources, or other project challenges, National Instruments Alliance Partner members can help. To learn more, call your local NI office or visit ni.com/alliance •...
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Appendix B Technical Support and Professional Services You also can visit the Worldwide Offices section of to access the branch ni.com/niglobal office Web sites, which provide up-to-date contact information, support phone numbers, email addresses, and current events. B-2 | ni.com...