32 ch, 24-bit, 5 ks/s or 51.2 ks/s simultaneous filtered data acquisition module (20 pages)
Summary of Contents for National Instruments PXIe-4480
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Dynamic Signal Acquisition PXIe-4480/4481 User Manual 6-Channel, 24-bit, 1.25 MS/s DSA Analog Input PXIe-4480/4481 User Manual October 2016 376368A-01...
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PXIe-4480/4481 Dynamic Signal Acquisition (DSA) analog input module. Driver support for the PXIe-4480/4481 was first available in NI-DAQmx 16.1. For a list of devices supported by a specific release, refer to the NI-DAQmx Readme, available on the version-specific download page or installation media.
Getting Started Specifications Refer to the PXIe-4480/4481 Specifications at for module specifications. ni.com/manuals Accessories Accessories for the PXIe-4480 and PXIe-4481 include the following shielded InfiniBand 12x cables: • SHB12X-6BNC (6 BNC analog inputs) • SHB12X-6MXLRM (6 mini-XLR analog inputs) •...
Input Connector Pinouts The PXIe-4480/4481 front panel has one 73-pin 12x InfiniBand connector. Figure 2-1 and Figure 2-2 show the pinout diagrams for the PXIe-4480 and the PXIe-4481, respectively.
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Chapter 2 Using the Module Table 2-3. BNC Connector Pin Assignments BNC Connector Pin Diagram Signal Name Signal Description Positive analog input signal (0 to 5) Negative analog input signal (0 to 5) Table 2-4. mXLR Connector Pin Assignments mXLR (Male) Connector Pin Diagram Signal Name...
PXIe-4480/4481 User Manual Front Panel LED Status The PXIe-4480/4481 module uses two LEDs to indicate status and activity. Table 2-5 summarizes the functionality of the LEDs on the module. Table 2-5. PXIe-4480/4481 LED Descriptions State Description Access Module is not yet functional, or the module has detected a problem with a power rail.
Chapter 2 Using the Module Block Diagrams Figure 2-3 shows the PXIe-4480 analog input circuitry block diagram. Depending on the connector type, connect the signals as described in the section. Connecting Signals Figure 2-3. PXIe-4480 Analog Input Block Diagram EX<0..5>+ Excitation Voltage 10 V / 25 V / Adj (9.5 V to 12 V)
The term pseudodifferential refers to the 50 Ω resistance between the negative input terminal and chassis ground. Attach the PXIe-4480/4481 to the chassis with the screws on the top and Note bottom of the front panel to provide a reliable ground connection.
In the charge measurement function (PXIe-4480 only), the negative input terminal is grounded. Input Connections Figure 2-5 shows the PXIe-4480/4481 voltage input connection with the terminals in differential configuration. Figure 2-5. PXIe-4480/4481 Voltage Input Connection in Differential Configuration...
Input Coupling You can configure the PXIe-4480/4481 modules for either AC or DC coupling. If you select DC coupling, any DC offset present in the source signal is passed to the ADC. The DC-coupled configuration is usually best if the signal source has only small amounts of offset voltage or if the DC content of the acquired signal is important.
Typical IEPE sensors have an enclosure that is electrically isolated from the Note IEPE electronics. As a result, connecting the sensor to the PXIe-4480 results in a floating connection even though the enclosure of the sensor is grounded. Transducer Electronic Data Sheet The PXIe-4480 supports Class 1 Transducer Electronic Data Sheet (TEDS) according to the IEEE 1451.4 standard.
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Chapter 2 Using the Module Figure 2-8 illustrates the internal construction of a powered/amplified sensor. Table 2-8 provides a guide for connecting signals from the PXIe-4480 to the sensor. Figure 2-8. Powered/Amplified Sensor +INPUT REGULATOR –INPUT +OUTPUT AMPLIFIER –OUTPUT Table 2-8. Powered/Amplified Sensor Connection...
PXIe-4480/4481 User Manual Care must be exercised in this type of application, however, as the PXIe-4480 does not provide some of the features of a true strain measurement module, specifically remote sense of the excitation voltage. Without remote sense, the voltage present at the bridge will be slightly less than output by the module, due to the presence of lead wire resistance.
The PXIe-4480/4481 treats overtemperature as a non-fatal error in that the module can still be operated while in this condition. However, the integrity of the data being acquired may be compromised while the PXIe-4480/4481 is displaying an overtemperature condition.
The PXIe-4480/4481 also supports time domain mode, in which the oversampled data is loosely filtered so that a maximum amount of bandwidth can be measured. Data may or may not be decimated.
These frequencies are referred to as the ADC alias holes. To minimize the error from the ADC alias holes, the PXIe-4480/4481 modules feature a fixed-frequency analog filter. This analog filter removes high-frequency components in the analog signal path before they reach the ADC.
PXIe-4480/4481 and when the data associated with that event is available at the output of the acquisition and filtering process. This delay is called the group delay. In order to simplify the...
Delta-Sigma ADCs. In time domain mode, these sharp filters are bypassed and the raw modulator data is sent directly to the FPGA of the PXIe-4480/4481 module where it is filtered. Figure 3-2 shows the FFT power spectrum of the modulator data when the analog inputs are shorted to ground with ±10 V range selected.
(ENOB) of 4.2 bits, which makes the acquisition nearly worthless. The PXIe-4480/4481 can be programmed with a symmetric FIR filter with up to 36 coefficients. Users can design their own filter and, using the NI-DAQmx Channel Property Node, program it to the PXIe-4480/4481.
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Refer to the PXIe-4480/4481 Specifications for more information about the default filter and the performance of time domain mode when using the default filter.
The returned samples do not pass through any additional filtering in the decimation process. The PXIe-4480/4481 supports decimation with n = 1 to 15. The lowest supported rate is 1.333333 MS/s (20 MS/s ÷15). Note that NI-DAQmx always coerces the requested sample rate up to the next sample rate that the hardware is capable of producing.
Time (µs) Data Throughput The amount of data generated by a single PXIe-4480/4481 with all six channels acquiring at 20 MS/s can cause buffer overflow errors if the system is unable to transfer sample data from the device quickly enough. If this occurs, NI-DAQmx software will stop the acquisition and return error -200361, “Onboard device memory overflow…”...
The PXIe-4480/4481 uses a x4 PXI Express connection to the PXI Express chassis backplane. Note that while the PXIe-4480/4481 will operate with a x1 connection, the amount of data that can be sent to the host computer will be limited and therefore tasks using multiple channels at higher sample rates may experience buffer overflow errors.
Reference-triggered acquisitions can therefore only be configured as finite tasks. The analog trigger on the PXIe-4480/4481 cannot be used as a start trigger. This restriction is a result of the way the module compensates for the filter group delay.
Synchronization is important to minimize skew between channels and to eliminate clock drift between modules in long-duration operations. You can synchronize the analog input operations on two or more PXIe-4480/4481 modules to extend the channel count for your measurements. In addition, the PXIe-4480/4481 can synchronize with certain DSA modules, such as the PXIe-449x modules, using Reference Clock Synchronization.
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PXI Express chassis. Choose an arbitrary PXIe-4480/4481 master module to issue a sync pulse on one of the PXIe Trigger lines. The sync pulse resets the ADCs and oversample clocks, phase aligning all the clocks in the system to within nanoseconds.
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