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Force Computers cPCI-690
PowerCore CompactPCI Single-Board Computer
A l l t r a d e m a r k s , b r a n d n a m e s , a n d b r a n d s a p p e a r i n g h e r e i n a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s .
• C r i t i c a l a n d e x p e d i t e d s e r v i c e s
• I n s t o c k / R e a d y - t o - s h i p
Artisan Scientific Corporation dba Artisan Technology Group is not an affiliate, representative, or authorized distributor for any manufacturer listed herein.
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Summary of Contents for Motorola PPC-690

  • Page 1 Force Computers cPCI-690 PowerCore CompactPCI Single-Board Computer In Stock Used and in Excellent Condition Open Web Page https://www.artisantg.com/60554-1 A l l t r a d e m a r k s , b r a n d n a m e s , a n d b r a n d s a p p e a r i n g h e r e i n a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s . •...
  • Page 2: Reference Guide

    PPC/CPCI-690 Reference Guide P/N 227356 Revision AC June 2006...
  • Page 3 Electronic versions of this material may be read online, downloaded for personal use, or referenced in another document as a URL to the Motorola Embedded Communications Computing Web site. The text itself may not be published commercially in print or electronic form, edited, translated, or otherwise altered without the permis- sion of Motorola GmbH.
  • Page 4: Table Of Contents

    Contents Using This Guide Other Sources of Information Safety Notes Sicherheitshinweise Introduction About this Manual ..........1-3 Organization of this Manual .
  • Page 5 Installation Action Plan ............2-3 Requirements .
  • Page 6 CompactPCI Connectors ......... . . 3-8 J1 and J2 .
  • Page 7 Displaying ..............4-29 devshow .
  • Page 8 PCI Bus 0 ............5-8 SENTINEL .
  • Page 9 Register ............6-10 LED Control Register .
  • Page 10 Tables Introduction Standard Compliance ............1-6 Table 1 Ordering Information Excerpt .
  • Page 11 Table 19 Devices on PCI Bus 1............5-12 Table 20 PCI Bus 1 Interrupt Routing .
  • Page 12 Figures Introduction Figure 1 Function Blocks ........... . . 1-5 Installation Figure 2 Voltage Keys .
  • Page 13 Battery Exchange Figure 19 Battery Location ........... . A-3 Figure 20 .
  • Page 14: Using This Guide

    Using This Guide This Reference Guide is intended for users qualified in electronics or electri- cal engineering. Users must have a working understanding of Peripheral Component Interconnect (PCI), Compact Peripheral Component Intercon- nect (CPCI), and telecommunications. Conventions Notation Description All numbers are decimal numbers except when used with the nota- tions described below 00000000 Typical notation for hexadecimal numbers (digits are 0 through F),...
  • Page 15 Notation Description No danger encountered. Pay attention to important information Note: marked using this layout Caution Possibly dangerous situation: slight injuries to people or damage to objects possible Dangerous situation: injuries to people or severe damage to objects Danger possible Abbreviations Address Resolution Protocol Binary-Coded Decimal...
  • Page 16 ID-ROM Identification Read-Only Memory IPMI Intelligent Platform Management Interface Light Emitting Diode Linear Feet per Minute Media Access Control Layer Media Independent Interface Multi Purpose Pins Nonmaskable Interrupt NVRAM Nonvolatile Read-Only Memory Peripheral Component Interconnect Physical Layer Programmable Logic Device Peripheral Management Controller PCI Mezzanine Card PROM...
  • Page 17 SRAM Static RAM Twisted-Pair Ethernet UART Universal Asynchronous Receiver/Transmitter PPC/CPCI-690...
  • Page 18: Revision History

    Revision History Order No. Revision Date Description 216049 March 2002 Preliminary Manual 216049 October 2002 New version of Preliminary Manual: Changed manual type from Installation Guide to Reference Guide, modified “Other Sources of Information” page xx, changed CPU frequency value in whole document from 700 to 667 MHz, modified “About this Manual”...
  • Page 19 Order No. Revision Date Description 216049 January 2003 corrected “Power Requirements” page 2-6, corrected note in “Hardware Upgrades and Accessories” page 2-8 and “IDE Devices” page 2-12, changed SW1-4 from Abort Key to Reserved and SW4-4 from EndurX CO 21k system relevant switch to reserved in Table 7 “Switch Settings”...
  • Page 20 “ipmi_flsupd” with reference to IPMI Firmware for PPC/CPCI-690 and PPC/CPCI- 695 Installation Guide, updated “Other Sources of Information”, editorial changes 227356 September Brought manual to Motorola-style (copy- 2005 right, logo etc.); updated description of PowerBoot commands netload and net- save. 227356 January 2006 Corrected P/N number on titlepage.
  • Page 21: Other Sources Of Information

    Motorola motorola.com/com- SENTINEL Rev.1 Reference Guide puters Only available via SMART IPMI Reference Guide Only available via Motorola literature cata- IPMI Firmware for PPC/CPCI-690 and PPC/CPCI-695 Installation Guide Only available via Motorola literature cata- Galileo marvell.com/prod- GT-64260A System Controller for PowerPC...
  • Page 22 Company www. Document RAMiX DDC no. Rx-URMH 090 Rev A Hardware Reference Manual PMC233/4/5 & PMC243/4/5 High Capacity Disk Solu- tions Samsung samsungsemi.com K4S560832C 256MBit LVTTL SDRAM search for K4S560832C Vitesse vitesse.com VSC215 Baseboard Management Controller search for VSC215 PPC/CPCI-690...
  • Page 23 xxii PPC/CPCI-690...
  • Page 24: Safety Notes

    The board has been tested in a standard Motorola system and found to comply with the limits for a Class A digital device in this system, pursu- ant to part 15 of the FCC Rules respectively EN 55022 Class A.
  • Page 25 Installation Electrostatic discharge and incorrect board installation and removal can damage circuits or shorten their life. Therefore: • Before installing or removing the board, read “Action Plan” page 2-3. • Touching the board or electronic components in a non-ESD protected environment causes component and board damage.
  • Page 26 Replacement/Expansion Only replace or expand components or system parts with those recom- mended by Motorola. Otherwise, you are fully responsible for the impact on EMC and the possibly changed functionality of the product. Check the total power consumption of all components installed (see the technical specification of the respective components).
  • Page 27 Switch Settings Changing the setting of switches marked as ‘reserved’ causes the board to malfunction. Do not change the settings of switches marked as ‘reserved’ for they might carry production-related functions. Setting/resetting the switches during operation causes board damage. Therefore, check and change switch settings before you install the board. If you change the boot block flash write protection you may unintention- ally overwrite boot flash 2.
  • Page 28 ID ROM and IPMI ID ROM. Updating the IPMI flash with wrong data will damage the IPMI control- ler. Only update the IPMI flash with data provided by Motorola. Battery Wrong battery installation may result in a hazardous explosion and board damage.
  • Page 29 xxviii PPC/CPCI-690...
  • Page 30: Sicherheitshinweise

    Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können es aber in keinem Fall ersetzen. Das Board wurde in einem Motorola Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse A.
  • Page 31 Wenn Sie das Board ohne PMC Modul verwenden, schirmen Sie freie Steckplätze mit einer Blende ab, um einen ausreichenden EMV Schutz zu gewährleisten. Wenn Sie Boards in Systeme einbauen, schirmen Sie freie Steckplätze mit einer Blende ab. Installation Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau des Boards kann Schaltkreise beschädigen oder ihre Lebensdauer verkürzen.
  • Page 32: Betrieb

    Stellen Sie sicher, dass Anschlüsse und Kabel des Boards während des Betriebs nicht berührt werden können. Austausch/Erweiterung Verwenden Sie bei Austausch oder Erweiterung nur von Motorola empfohlene Komponenten und Systemteile. Andernfalls sind Sie für mögliche Auswirkungen auf EMV und geänderte Funktionalität des Produktes voll verantwortlich.
  • Page 33 Übersteigt der Gesamtstromverbrauch pro PMC Modul 7,5W, können das Modul und das Board beschädigt werden. Stellen Sie sicher, dass der Gesamtstromverbrauch pro PMC Modul bei +/- 12V, 5V und 3,3V 7,5W nicht übersteigt (Summe aller Spannungen). Verwenden Sie ein anderes RTB als das ACC/RTB-602, kann dies zu Kurzschlüssen und yu einer Beschäding sowohl des Boards als auch des RTBs führen.
  • Page 34 Boards. Überschreiben Sie deshalb keine ID ROM und IPMI ID ROM relevanten Daten. Aktualisieren Sie das IPMI Flash mit falschen Daten, führt dies zur Beschädigung des IPMI Controllers. Aktualisieren Sie das IPMI Flash nur mit Daten, die Sie von Motorola bekommen. PPC/CPCI-690 xxxiii...
  • Page 35 Batterie Fehlerhafter Austausch von Lithiumbatterien kann zu lebensgefährlichen Explosionen führen. Verwenden Sie die Batterien länger als zehn Jahre, kann dies zu Daten- verlusten führen. Tauschen Sie deshalb die Batterie aus, bevor zehn Jahre reiner Betrieb vorüber sind. Der Austausch der Batterie bringt immer einen Datenverlust bei den Komponenten mit sich, die sich durch die Batterie die Stromversorgung sichern.
  • Page 36: Introduction

    Introduction...
  • Page 38: About This Manual

    Introduction About this Manual About this Manual This reference Guide provides the information that you need to install, access and operate the board. Organization of this Manual The Reference Guide is organized as follows. Chapter Description Using This Guide Lists all conventions and abbreviations used in this manual and outlines the revision his- tory Other Sources of Information...
  • Page 39: Feedback

    Describes how to deal with problems related to the operation of the board Feedback Motorola welcomes and appreciates your comments on its documentation. We want to know what you think about our manuals and how we can make them better. Mail comments to: •...
  • Page 40: Features

    Features The PPC/CPCI-690 is a single-slot 6U universal CompactPCI hot-swap board using Motorola’ SENTINEL PCI-to-CompactPCI universal bridge technology. As it is based on an IBM 750FX or 750GX PowerPC processor of up to 1 GHz, the board offers high performance. Combined with full hot- swap capabilities it is an ideal component for multi-node processor sys- tems.
  • Page 41: Standard Compliance

    Standard Compliance Standard Description EN 60950 Legal safety requirements UL 60950 UL 94V-0/1 (predefined Motorola system) EN 55022 EMC requirements on system level EN 55024 FCC Part 15 Class A ANSI/IPC-A610 Rev. C Class 2 Manufacturing requirements IPC-7711 and 7721 ANSI-J-001...003...
  • Page 42: Ordering Information

    Introduction Ordering Information Ordering Information When ordering the PPC/CPCI-690 board variants, upgrades and accesso- ries, use the order numbers given below. Product Nomenclature In the following you find the key for the product name extensions. PPC/CPCI-690/xxx-ccc-zz/PSB SDRAM size in MByte Processor clock frequency in MHz User flash capacity in MByte Packet switching backplane variant...
  • Page 43: Table 2 Ordering Information Excerpt

    Ordering Information Introduction Table 2: Ordering Information Excerpt (cont.) Order No. PPC/CPCI-690 Description 120922 .../512-700-32/PSB IBM 750FX PowerPC processor, 667 MHz with 512 MByte main mem- ory, user flash 32 MByte, for PICMG 2.16 Packet Switching Backplane sys- tems 120911 .../1024-700-32/PSB IBM 750FX PowerPC processor, 667 MHz with 1024 MByte main mem-...
  • Page 44: Installation

    Installation...
  • Page 46: Action Plan

    Installation Action Plan Action Plan To install the board, the following steps are necessary and described in detail in the sections of this chapter. PPC/CPCI-690 2 - 3...
  • Page 47 Action Plan Installation 2 - 4 PPC/CPCI-690...
  • Page 48: Requirements

    Installation Requirements Requirements To meet the environmental requirements, the board has to be tested in the system where it is to be installed. Before you power up the board, calculate the power needed according to your combination of board upgrades and accessories.
  • Page 49: Power Requirements

    For information on the accessories’ power requirements, refer to the docu- mentation coming with the respective accessory or ask your local Motorola representative. The following table gives the typical power requirements for a board with: •...
  • Page 50: Table 4 Power Requirements For Boards With 750Fx Processor (667 Mhz)

    Installation Requirements Table 4: Power Requirements for Boards with 750FX Processor (667 MHz) Requirement +3.3V 3.3V Maximum power dissipation 9.6W 7.5W 1.32W 2.0W Min. Voltage 3.20V 4.85V 3.20V 4.85V Max. Voltage 3.45V 5.25V 3.45V 5.25V Max. Current 2.9A 1.5A 0.4A 0.4A 1) If 3.3V or 5V are used depends on used system The table below gives the typical power requirements for a board with:...
  • Page 51: Hardware Upgrades And Accessories

    Hardware Upgrades and Accessories Installation Hardware Upgrades and Accessories The PPC/CPCI-690 itself allows an easy and cost-efficient way to adapt the system board to your application needs. The following table gives an overview on the possible product combina- tions, described in Table 2 “Ordering Information Excerpt” page 1-7. Note: If you use the PMC-244FD and if you want to use the IDE interface via the RTB, the PMC module has to be installed into PMC slot 1.
  • Page 52: Signaling Level

    Installation Hardware Upgrades and Accessories Signaling Level The PMC slots provide a 3.3V PCI interface, therefore, only PMC modules which support a V I/O of 3.3V can be installed. Since 5V PMC modules do not have drill holes at the 3.3 V voltage key position, the voltage keys pre- vent these modules from being installed into the PMC slots.
  • Page 53: Figure 4 Pmc Connectors And Slots

    Hardware Upgrades and Accessories Installation Caution PMC module and board damage If the power consumption of the PMC module exceeds 7.5W, the board and the PMC module may be damaged. Therefore, make sure that the total max. power consumption at +/–12V, 5V and 3.3V level does not exceed 7.5W (total over all used voltages).
  • Page 54: Removal Procedure

    Installation Hardware Upgrades and Accessories 5. Check whether standoffs of module cover mounting holes of board Figure 5: Position of Mounting Holes 6. Place screws delivered with PMC module from bottom side into mounting holes 7. Fasten screws Removal Procedure 1.
  • Page 55: Ide Devices

    For further information, refer to the ACC/RTB-602 Installation Guide. Rear Transition Board As a separate price list item, Motorola offers the ACC/RTB-602. The RTB provides access to the board’s CompactPCI user I/O interfaces via industry standard connectors. For further information, refer to the ACC/RTB-602 Installation Guide.
  • Page 56: Switch Settings

    Installation Switch Settings Switch Settings The board provides three configuration switches, SW1, SW2, and SW4. Figure 6: Location of Switches For default settings, the white switches are moved to the OFF position. Caution • Board malfunction Changing the setting of switches marked as ‘reserved’ causes the board to malfunction.
  • Page 57 Switch Settings Installation Switch Settings Table 7: Switch Number Description IPMI FORCE_PM OFF: Automatic PM/BMC detection (default) IPMI controller is PM FORCE IPMI SYSEN OFF: The IPMI controller senses the CPCI_SYSEN (default) The IPMI SYSEN is active Front panel reset OFF: Reset key enabled (default) Reset key disabled...
  • Page 58 Installation Switch Settings Table 7: Switch Settings Switch Number Description Reserved OFF: Default Reserved OFF: Default Reserved OFF: Default Reserved OFF: Default 1) The IPMI controller is BMC (SYSEN active) or PM (SYSEN inactive) PPC/CPCI-690 2 - 15...
  • Page 59: Board Installation

    Board Installation Installation Board Installation The board’s front panel provides a compatibility glyph indicating whether you use a CompactPCI standard or a PSB board variant: Compatibility Glyphs for CompactPCI Standard and PSB Board Variants Figure 7: The standard CompactPCI board can be used either as system controller in a system slot or as an intelligent I/O board in a peripheral slot.
  • Page 60: Installation In A Nonpowered System

    Installation Board Installation Installation in a Nonpowered System As a universal hot-swap board, the CPCI-690 can be installed in both 3.3V and 5V systems. Note: Before installing the board install the upgrades and accessories, if necessary (refer to “Hardware Upgrades and Accessories” page 2-8). Installation Procedure 1.
  • Page 61: Removal Procedure

    Board Installation Installation Removal Procedure Caution Board damage Touching the board or electronic components in a non-ESD protected environment causes component and board damage. Before touching boards or electronic components, make sure that you are working in an ESD-safe environment. 1.
  • Page 62: Man-Machine Interface

    Installation Board Installation Man-Machine Interface The board provides the following elements as man-machine interface: • Hot-swap switch Integrated in the lower handle of the front panel, it allows the user to indicate the intention to remove the board to the system controller. •...
  • Page 63: Removal Procedure

    Board Installation Installation 1. Check board configuration, e.g. switch settings Into Basic Hot-Swap System 2. Check that you are using an ACC/RTB-602, if applicable 3. PSB variant: Install board into node slot Standard CompactPCI variant: Install board into peripheral slot of powered system 4.
  • Page 64: Figure 8 Button On Handle

    Installation Board Installation • Board damage Touching the board or electronic components in a non-ESD protected environment causes component and board damage. Before touching boards or electronic components, make sure that you are working in an ESD-safe environment. The removal procedure depends on the system the board is to be removed from.
  • Page 65 Board Installation Installation 2 - 22 PPC/CPCI-690...
  • Page 66: Controls, Indicators, And Connectors

    Controls, Indicators, and Connectors...
  • Page 68: Front Panel

    Controls, Indicators, and Connectors Front Panel Front Panel The front panel provides a compatibility glyph indicating whether you use a CompactPCI standard or a PSB board variant: Figure 9: Compatibility Glyphs for CompactPCI Standard and PSB Board Variants The following figure highlights the position of the cutouts for the PMC modules, the keys, the connectors and the LEDs on the CPCI-690 front panel.
  • Page 69: Pmc Cutouts

    Front Panel Controls, Indicators, and Connectors PMC Cutouts The front panel provides two cutouts to install PMC modules. 3 - 4 PPC/CPCI-690...
  • Page 70: Key

    Controls, Indicators, and Connectors Front Panel The only key available at the front panel is the mechanical reset key. If the board is installed into a peripheral slot of a standard CompactPCI system or a node slot of a PSB backplane using the CompactPCI bus, the re- set key instantaneously affects the board by generating a main reset when enabled and toggled.
  • Page 71: Leds

    Front Panel Controls, Indicators, and Connectors LEDs The front panel provides the following four LEDs: Table 8: Description of Front Panel LEDs Description R/U1 Hardware-LED mode (default): Reset LED indicates board status Green: Normal operation Red: Reset is active User-LED mode (see “userled” page 4-26): User LED 1 can be programmed to be red, green or OFF E/U2 Hardware-LED mode (default): Blinking Ethernet LED indicates the sta-...
  • Page 72: Connectors

    Controls, Indicators, and Connectors Front Panel Connectors The front panel provides the following connectors: • RJ45 for Ethernet 1 • Micro D-SUB for serial ports 1 and 2 The following connector pinouts provide information on signal assign- ments. Figure 11: Ethernet 1 Connector Pinout Figure 12: COM 1 and 2 Connector Pinout PPC/CPCI-690 3 - 7...
  • Page 73: Compactpci Connectors

    CompactPCI Connectors Controls, Indicators, and Connectors CompactPCI Connectors The board provides the CompactPCI connectors J1, J2, J3, and J5. The Com- pactPCI interface is clocked with 33MHz and is 32-bit wide. Figure 13: Location of CompactPCI Connectors J1 and J2 The J1 and J2 connectors implement the CompactPCI 64-bit connector pinout as specified by the CompactPCI specification PICMG 2.0 R3.0.
  • Page 74: Figure 14 J3 Connector Pinout

    Controls, Indicators, and Connectors CompactPCI Connectors Connector J3 provides interfaces to • Ethernet 2 and 3 • PMC1 user I/O Figure 14: J3 Connector Pinout Connector J5 provides interfaces to: • COM 1 and 2 • PMC2 user I/O • ICMB and IPMB1 port •...
  • Page 75: Figure 15 J5 Connector Pinout Rows A To C

    CompactPCI Connectors Controls, Indicators, and Connectors Figure 15: J5 Connector Pinout Rows A to C Figure 16: J5 Connector Pinout Rows D and E 3 - 10 PPC/CPCI-690...
  • Page 76: Powerboot

    PowerBoot...
  • Page 78: Introduction

    PowerBoot Introduction Introduction PowerBoot is the firmware providing an interface between the operating system and the hardware of the board. It is used for hardware configura- tion. Before loading the operating system, PowerBoot performs basic hard- ware tests and prepares the board for the initial boot-up procedure. PowerBoot can be used for the following tasks: •...
  • Page 79: Address Mapping

    Address Mapping PowerBoot Address Mapping After you power on the board, the on-board devices are initialized. The fol- lowing table lists the default addresses of the board’s devices mapped by PowerBoot. Address Device Size 00000000 .. 7FFFFFFF SDRAM: max. 2 GByte On-board memory and memory modules 80000000...
  • Page 80: Booting The Board

    PowerBoot Booting the Board Booting the Board When the board is turned on or rebooted, the presence and functionality of the board’s components is tested by the power-on self test (POST). After POST has finished, the board can either boot automatically or after entering the autoboot command.
  • Page 81: Setting Boot Parameters

    Booting the Board PowerBoot Example: Testing RAM......done Testing Boot FLASH..CSUM 0x20A7..done Testing PCI Bus ....done Testing Discovery Ethernet..done If POST is disabled, a value of 00 will be stored at NVRAM offset 7CF8 to indicate that no test results are available. Setting Boot Parameters In order to set the boot parameters, enter the command setboot at the prompt.
  • Page 82 PowerBoot Booting the Board Table 10: Setboot Options Option Description Parameter Required to be set when Booting from RARP (Reverse To select the protocol 1: RARP Address Reso- used to connect a server 2: ARP lution) or ARP to the board for auto- (Address Reso- boot.
  • Page 83: Selecting The Boot Device

    Booting the Board PowerBoot Selecting the Boot Device You can chose the board to boot automatically from four different locations: • Network • Flash • ATA/IDE • Go command However, for three boot sources prerequisites are necessary: Table 11: Boot Source Prerequisites Boot Source Prerequisite Network...
  • Page 84 PowerBoot Booting the Board 4. Enter netload command to load image into DRAM memory PowerBoot> netload this-is-my-file-name 100000 PHY-Device at 100MB/s and full duplex negotiated WANCDM MAC ADDRESS : 00:80:42:11:6A:C3 Transmitting RARP-REQUEST... Reception of RARP-REPLY Transmitting TFTP-REQUEST to server 02:80:42:0A:0D:79, IP 192.168.41.1 PACKET:307 - loaded $00100000..$001265CF (157136 bytes) PowerBoot>...
  • Page 85: Autoboot

    Booting the Board PowerBoot 8. Enter md command to display contents of programmed user flash PowerBoot> md f4000000 f4000000: 46 4f 52 43 45 20 46 4f 52 43 45 20 46 4f 52 43 f4000010: 45 20 46 4f 52 43 45 20 46 4f 52 43 45 20 46 4f f4000020: 52 43 45 20 46 4f 52 43...
  • Page 86: Restoring Default Values

    PowerBoot Booting the Board Restoring Default Values After parameters have been edited, a checksum is calculated to protect the NVRAM contents from offset 7C00 to 7FF0 containing all edited param- eters. If you have changed a value, restoring the default values is only pos- sible by means of either removing the battery from the board or writing a wrong value into the protected NVRAM range.
  • Page 87: Command Set

    Command Set PowerBoot Command Set In the following, the CPCI-690-specific PowerBoot commands are described in detail. These commands can be used to: • Test the board • Get information on devices and settings • Exchange data • Enable, disable and change configuration settings Table 12: Command Set Overview Task Command...
  • Page 88: Devshow

    PowerBoot Command Set Table 12: Command Set Overview Task Command Page Display Information on the board’s PCI bus structure devshow 4-29 Supported I2C EEPROMs on the board eeprom_info 4-31 Help message help 4-31 HID0/1, MSR and L2CR register values 4-32 Information on the on-board IPMI controller ipmi_info 4-33...
  • Page 89 Command Set PowerBoot Testing The following commands can be used to: • Test the interface specified by setboot • Perform basic binary tests to locate memory errors • Perform memory read performance • Perform memory write performance • Perform memory read and write performance atatest Command to test the interface which is specified with the setboot com- ESCRIPTION...
  • Page 90: Table 13 Bt Test Types

    PowerBoot Command Set Bytes per Sector : 576 [0x240] Total Capacity in Bytes: 72253440 [0x44E8000] ATA Write Buffer, CHS, polling... ATA Read Buffer, CHS, polling... Checking Buffer R/W contents... ATA Read-4-Sectors, LBA, polling... ATA/IDE-test okay PowerBoot> This commands executes a set of basic binary tests to locate memory errors. ESCRIPTION The following test types are executed: Table 13: BT Test Types...
  • Page 91 Command Set PowerBoot ARAMETERS Specifies the first byte of the memory area to be tested begin Specifies the first area of the memory area not to be tested Achieves that the test runs endlessly Achieves that the test uses the cache XAMPLE PowerBoot>...
  • Page 92 PowerBoot Command Set dread Command to test memory read performance. ESCRIPTION YNTAX dread None ARAMETERS XAMPLE PowerBoot> dread Memory Read Performance in ns address range: 0x00010000..0x00410000 d = 2^02 : d = 2^03 : d = 2^04 : d = 2^05 : d = 2^06 : d = 2^07 : d = 2^08 :...
  • Page 93 Command Set PowerBoot Command to test memory write performance. ESCRIPTION YNTAX None ARAMETERS XAMPLE PowerBoot> drw Memory Read/Write Performance in ns address range: 0x00010000..0x00410000 d = 2^02 : d = 2^03 : d = 2^04 : d = 2^05 : d = 2^06 : d = 2^07 : d = 2^08 :...
  • Page 94 PowerBoot Command Set dwrite Command to test memory read and write performance. ESCRIPTION YNTAX dwrite None ARAMETERS XAMPLE PowerBoot> dwrite Memory Write Performance in ns address range: 0x00010000..0x00410000 d = 2^02 : d = 2^03 : d = 2^04 : d = 2^05 : d = 2^06 : d = 2^07 :...
  • Page 95 Command Set PowerBoot Setting The following commands are used to set: • Baud rate • Cache • Interrupts • Memory contents • Boot Options • Parameters for the SENTINEL SROM • User LED • Watchdog baud Command to change the actual baud rate to the specified value. To apply ESCRIPTION the new baud rate, a reboot is necessary.
  • Page 96 PowerBoot Command Set cache Enables or disabled the available caches. ESCRIPTION YNTAX cache <d|i|2> <e|d> ARAMETERS Selects the data cache Selects the instruction cache Selects the 2nd level cache e: Enables the cache d: Disables the cache XAMPLE PowerBoot> cache d d Data cache disabled PowerBoot>...
  • Page 97: Table 14 Navigation Commands

    Command Set PowerBoot This command provides an editor with which you can display and modify ESCRIPTION the memory contents of an address. Three tasks can be carried out: • Displaying and modifying the memory contents of an address • Specifying the memory access size and displaying and modifying the memory contents of an address •...
  • Page 98 PowerBoot Command Set First byte which is read for displaying and modifying the memory contents address Specifies the memory access size. Possible values are: size • B: Memory access is byte-sized (8 bit) • W: Memory access is word-sized (16 bit) •...
  • Page 99 Command Set PowerBoot setboot Command to set boot options. ESCRIPTION YNTAX setboot None ARAMETERS XAMPLE PowerBoot> setboot -General Boot Parameters- Boot select [0=Net,1=Go,2=Flash+Copy,3=ATA-IDE (0) : Auto boot [0=disable, 1=enable], (0) : Auto boot delay [0..99s], (0) : Load address (00000000) : Boot address (00000000) : -TFTP Ethernet/SCSI/ATA-IDE boot file parameters- Ethernet 1, 2 or 3 : (0) :...
  • Page 100 PowerBoot Command Set setcpci Command to set parameter for the SENTINEL SROM. ESCRIPTION YNTAX setcpci [-e] ARAMETERS Extended options XAMPLE PowerBoot> setcpci -e Downstream BAR 0 Setup (0xfffff000) : Downstream BAR 0 translate (0x0) : Downstream BAR 2 Setup (0xfff00000) : Downstream BAR 2 translate (0x0) : Downstream BAR 3 setup (0x0) : Downstream BAR 3 translate (0x0) :...
  • Page 101 Command Set PowerBoot userled Command to set the function of the user LEDs. ESCRIPTION YNTAX userled <1|2> <red|green|dis|HW|ethX> ARAMETERS Selects user LED 1 Selects user LED 2 USERLED is red USERLED is green green USERLED is disabled USERLED shows default state after power up USERLED shows Ethernet activity.
  • Page 102 PowerBoot Command Set Copying The following commands are used to copy: • Memory area • NVRAM contents Command to copy the contents of a specified source memory area to a ESCRIPTION memory area starting at a specified destination address. However, if the source and the destination area overlap, only the destination area will be complete.
  • Page 103 Command Set PowerBoot nvramwr Command to copy a memory area into the NVRAM and generate the cor- ESCRIPTION rect checksum. YNTAX nvramwr <scr-address> ARAMETERS scr- Location of the new NVRAM contents address XAMPLE PowerBoot> nvramwr 100000 Do you really want to write data to NVRAM [y/n]: y Write 32KB data at address 0x00100000 to NVRAM CSUM : 0xCEC PowerBoot>...
  • Page 104 PowerBoot Command Set Displaying The following commands are used to display information on: • The board’s PCI bus structure • The board’s I2C EEPROMs • Commands provided by PowerBoot • Processor register values • On-board IPMI controller • Memory contents •...
  • Page 105 Command Set PowerBoot XAMPLE PowerBoot> devshow 4 o Discovery@0 [inst 0, loc 0/0/0, node 0x1ff2125c, ref 3] - Device type: root - Secondary location: 0x0/0x0/0x0 - Driver Rtn / Parm: 0xfff17374 / 0x00000000 - ID: 0x00000000 - Flags: 0x0000011b o PCI@0 [inst 0, loc 0/0/0, node 0x1ff21d68, ref 1] - Implements Classes: PCI - Implements bus type: PCI bus...
  • Page 106 PowerBoot Command Set eeprom_info Command to display all supported I2C EEPROMs on the board. ESCRIPTION YNTAX eeprom_info None ARAMETERS XAMPLE PowerBoot> eeprom_info MSG: EEPROM information list ID_ROM_0 16384 Byte: ID-ROM of the base board ID_ROM_1 256 Byte: ID-ROM of the RTB ID_ROM_2 256 Byte: ID-ROM of the IPMI I2C_PCIBRIDGE_0...
  • Page 107: Hid

    Command Set PowerBoot FERASE - FERASE <flashbank>[,flashoffset,length] FPROG - FPROG <flashbank>,<source>[,flashoffset[,length]] GO - GO <address> HELP - HELP print this help message HID - Show HID0/1, MSR, L2CR register HRESET - Hardware Reset execution IPMI_FLSUPD - IPMI_FLSUPD <begin> <end> [addr] IPMI_INFO - Show IPMI info IPMI_REQUEST - IMPI_REQUEST <HEX>...
  • Page 108 PowerBoot Command Set ipmi_info Command to display information on the on-board IPMI controller. ESCRIPTION YNTAX ipmi_info None ARAMETERS XAMPLE PowerBoot> ipmi_info IPMI-Informations Device-ID: 1 Device-Revision: 1 Firmware-Revision: 0.9 IPMI-Version: 1 Geographical Addr: 0x1 IPMI-I2C_Addr: 0x20 IPMI-Role: 0 PowerBoot> This command displays the memory contents. The data is displayed in ESCRIPTION hexadecimal notation and ASCII code.
  • Page 109: Temp

    Command Set PowerBoot XAMPLE PowerBoot> md f1000000 f1000000: ff 20 00 70 ff 20 00 70 00 00 00 00 00 00 00 00 . .p. .p..f1000010: ff 00 00 00 ff 00 00 00 ff 0f 00 00 ff 0f 00 00 ....
  • Page 110: Exchanging Data

    PowerBoot Command Set Exchanging Data The following commands are used to: • Perform a PCI configuration read or write • Read data from the on-board EEPROMs • Write data to an on-board I2C EEPROM • Program flash memory devices • Start an IPMI flash update •...
  • Page 111: Config_Wr

    Command Set PowerBoot config_wr Command to perform a PCI configuration write to a specific PCI location. ESCRIPTION Caution Overwriting PCI configuration space SENTINEL may not work if configuration has been changed. Only change the configuration if you are familiar with the consequences. If after a change the board does not work, reboot the board.
  • Page 112: Eeprom_Read

    PowerBoot Command Set eeprom_read Command to read data from the on-board EEPROMs. ESCRIPTION YNTAX eeprom_read <device> <offs> <byteCnt> [<dstAddr>] ARAMETERS Name of the device is given by the eeprom_info command device Offset from which the read starts offs Count of bytes to be read byteCnt Destination of the read data dstAddr...
  • Page 113: Eeprom_Write

    Command Set PowerBoot eeprom_write Command to write data to an on-board I2C EEPROM. ESCRIPTION Caution Board malfunction The I2C EEPROM contains data for ID ROM and IPMI ID ROM. Over- writing this data results in a malfunction of the board. Do not overwrite the data for ID ROM and IPMI ID ROM.
  • Page 114: Fprog

    PowerBoot Command Set fprog This command programs flash memory devices. Three tasks can be carried ESCRIPTION out: • Programming a whole flash memory device • Programming the space between a specified offset and the end of the flash memory device •...
  • Page 115: Ipmi_Flsupd

    Danger Defect IPMI Flash When updating the IPMI flash with wrong data, it becomes unusable. Only update the IPMI flash with data provided by Motorola. Command to start an IPMI flash update. An update via IPMB is possible ESCRIPTION with the address option. For a detailed description of the update procedure refer to the current version of IPMI Firmware for PPC/CPCI-690 and PPC/CP- CI-695 Installation Guide available via S.M.A.R.T.
  • Page 116: Ipmi_Request

    PowerBoot Command Set ipmi_request Command to send values to the IPMI controller and display the response. ESCRIPTION YNTAX ipmi_request <HEX> [<HEX>][<HEX>] ... ARAMETERS Values in hexadecimal format XAMPLE PowerBoot> ipmi_request 18 01 1c 01 00 01 81 63 84 01 5f 48 0e 00 04 08 PowerBoot>...
  • Page 117 Command Set PowerBoot XAMPLE PowerBoot> lo 100200 PowerBoot> md 100200 10 00100200: 54 68 69 73 20 69 73 20 61 20 74 65 73 74 00 00 This is a test.. PowerBoot> _ 4 - 42 PPC/CPCI-690...
  • Page 118: Netload

    PowerBoot Command Set netload This command loads a binary image via TFTP (Trivial File Transfer Protocol) from ESCRIPTION a host acting as server for a specified Ethernet address. To create a connection to the server, the following two protocols are supported: •...
  • Page 119 Command Set PowerBoot The file “test” is downloaded to 00100000 on the CPU board with the XAMPLE Ethernet address from the BIB using RARP. PowerBoot> netload test 100000 PHY-Device at 100MB/s and full duplex negotiated WANCOM MAC ADDRESS : 00:80:42:11:67:C3 Transmitting RARP-REQUEST...
  • Page 120: Netsave

    PowerBoot Command Set netsave This command saves a specified memory area via TFTP into a file located in a host ESCRIPTION system. The file cannot be created, i.e. it must already exist on the host with correct write permissions. NETSAVE overrides the content of the file. For creating a con- nection to the server, the following 2 procedures are supported: •...
  • Page 121 Command Set PowerBoot XAMPLE PowerBoot> netsave test 100000 1fffff 00:80:42:11:67:c2 PHY-Device at 100MB/s and full duplex negotiated WANCOM MAC ADDRESS : 00:80:42:11:67:C2 Transmitting RARP-REQUEST... Reception of RARP-REPLY Transmitting TFTP-REQUEST to server 00:80:42:10:5B:C7, IP 192.168.41.1 PACKET:2049 - saved $00100000..$001FFFFF (1048576 bytes) PowerBoot>...
  • Page 122: Reset

    PowerBoot Command Set Reset The following commands are used to perform either a hardware or a soft- ware reset. hreset Command to initiate a hardware reset of the board. ESCRIPTION YNTAX hreset None ARAMETERS XAMPLE PowerBoot> hreset Init GT MPSC0 as UART Copy ROM to RAM Started at phys.
  • Page 123: Reset

    Command Set PowerBoot reset Command to initiate a software reset. ESCRIPTION YNTAX reset None ARAMETERS XAMPLE PowerBoot> reset Init GT MPSC0 as UART Copy ROM to RAM Started at phys. address: 0x1ff80000 Init DTLB/ITLB for block translation, enable MMU Init L1-Icache Init L1-Dcache Init L2-Cache Found IBM750FX at 667 MHz...
  • Page 124: Miscellaneous

    PowerBoot Command Set Miscellaneous The following commands are used to: • Fill a specified RAM memory area • Search a memory area • Compare two memory areas on a byte-organized level • Erase a flash memory device or a part of it •...
  • Page 125 Command Set PowerBoot Command to search a memory area for a byte, a word, or a long constant or ESCRIPTION for a user defined ASCII string. There are two tasks which can be done by means of bs: • Displaying the locations where the searched byte, word, long constant, or ASCII string is found •...
  • Page 126 PowerBoot Command Set An 8-KByte memory from 00004C00 .. 0006C00 is searched for the long XAMPLE constant EFEFEFEF . However, PowerBoot displays the address at which the long constant is not found (00004C10 ) and the value which is found instead.
  • Page 127: Ferase

    Command Set PowerBoot ferase Caution Data loss Using this command without specifying an area will erase the whole flash memory. If you do not want to erase the whole flash memory, specify an area by adding the destination offset and the number of bytes to be erased. This command erases a whole flash memory device or a specified area of ESCRIPTION the flash memory device.
  • Page 128 PowerBoot Command Set Only a specified area of user flash 1 is erased: XAMPLE PowerBoot> ferase USER_FLASH1 30000 40000 Erasing flash device... done. PowerBoot> _ This command starts executing a binary image located in the DRAM memory. ESCRIPTION After entering go you exit from PowerBoot. At the end of the binary image enter the opcode blr to return to PowerBoot.
  • Page 129 Command Set PowerBoot 4 - 54 PPC/CPCI-690...
  • Page 130: Buses

    Buses...
  • Page 132: Block Diagram

    Buses Block Diagram Block Diagram The block diagram shows how the board’s devices work together and which data paths they use. PPC/CPCI-690 5 - 3...
  • Page 133: System Controller

    System Controller Buses System Controller The Discovery system controller is a single chip solution for PowerPC based systems. The chip has a five bus architecture with: • 64-bit / 133 MHz interface to CPU • 64-bit and 8bit for ECC / 133 MHz interface to SDRAM •...
  • Page 134: Watchdog

    Buses System Controller Watchdog The system controller includes a bi-level watchdog timer which monitors the processor activity. The watchdog timer generates a non-maskable inter- rupt (NMI) after the first time-out period and a system reset pulse after the second time-out period. The watchdog can be enabled and disabled via Watchdog Configuration register by a write sequence of 01b followed by 10b to field CTL1.
  • Page 135: Ppc Bus

    PPC Bus Buses PPC Bus The 60x PowerPC bus connecting the system controller with the CPU is a 64-bit bus running at 133 MHz. The PPC/CPCI-690 is equipped with one of the following CPUs: • PowerPC 750FX This CPU has an internal 64-KByte L1-cache and 512 KByte of L2-cache, both with 256-bit wide cache paths.
  • Page 136: Memory Bus

    Buses Memory Bus Memory Bus The system controller has a 3.3V SDRAM interface running at frequencies up to 133 MHz. The interface consists of a 15-bit wide address bus and a 64- bit data bus plus eight additional bits for error checking and correction (ECC).
  • Page 137: Pci Bus 0

    INTD# INTB# SENTINEL Motorola SENTINEL is used as PCI-to-CompactPCI universal bridge that enables the board to work as either CompactPCI system (host) or periph- eral board. SENTINEL is capable to run in either 3.3V or 5V VIO environ- ment. For further information, refer to “Installation in a Powered System Supporting Hot Swap”...
  • Page 138: Table 18 Sentinel Sprom Contents

    Buses PCI Bus 0 Table 18: SENTINEL SPROM Contents Register Name Offset Configurable Default Value Comment Magic word 1146 Downstream IR FFFF mask Upstream IR FFFF mask Downstream BAR FFFFF000 Maps 4 KByte DSR reg- 0 DSR setup isters by default. Larger values provide access to on-board resources.
  • Page 139 PCI Bus 0 Buses Table 18: SENTINEL SPROM Contents Register Name Offset Configurable Default Value Comment O outbound FFFFFFFF post list interrupt mask Subsystem ven- 1146 dor ID preload Subsystem ID 0690 Board-specific sub- preload system ID O setup mask 00000000 Secondary min.
  • Page 140 Buses PCI Bus 0 Table 18: SENTINEL SPROM Contents Register Name Offset Configurable Default Value Comment Message control 0000 Scratchpad 0000 Primary program- ming interface Primary sub class This field defines code “Other Bridge”. Primary base class This field defines code “Bridge Device”.
  • Page 141: Pci Bus 1

    PCI Bus 1 Buses PCI Bus 1 PCI bus1 is capable to run at 64 bit and 66 MHz. Table 19: Devices on PCI Bus 1 PCI Device Device Type ID SEL Dev. No. PCI IRQ REQ/GNT Discovery PCI inter- GT-64260A INTA# Internal...
  • Page 142 The PMC 1 interface is a 3.3V compliant PCI interface with its user I/O sig- nals routed towards CompactPCI connector J3. PMC slot 1 can be used for Motorola’s PMC-8260 module. Non-Monarch mode ProcessorPMC mod- ules and Ramix IDE modules (on-module primary IDE interface) are sup- ported.
  • Page 143: Device Bus

    Device Bus Buses Device Bus The device bus is a 32-bit wide multiplexed bus that is used for connecting boot and user flash memory, RTC/NVRAM, IPMI controller and board registers that are implemented in logic. Boot Flash Boot flash memory consists of two 8-bit wide 512 KByte flash devices. The boot block memory range is write-protected (default) and can be repro- grammed on-board (see “fprog”...
  • Page 144: Ipmi Controller

    Buses Device Bus A SNAPHAT package with the battery and a 32.768 Hz crystal is mounted on top of the device. Device Type Memory Address Space M48T35AV-10MH1 F0100000..F01FFFF7 (NVRAM/RTC) M4T32-BR12SH F01FFFF8..F01FFFFF (Battery) IPMI Controller The IPMI unit consists of the micro controller Vitesse VSC215, 512 KByte SRAM, 3 MByte flash memory and 8 KByte RAM in the controller.
  • Page 145: Temperature Sensor

    To check how many SDRs are provided, use the IPMI command “Get Device SDR Info” together with the API of the Motorola VxWorks IPMI driver. To read the SDRs into your system management software, use the IPMI command “Get Device SDR”.
  • Page 146: I2C Bus Slave Addresses

    Temperature sensor LM75 Available IPMI Drivers Motorola offers an IPMI driver to access the IPMI controller. It is part of the VxWorks 5.4/Tornado 2.0 BSP Rel. 2-1. For further information, refer to the VxWorks 5.4/Tornado 2.0 BSP Rel. 2-1 Installation Guide and Release Notes and the IPMI Specification V.
  • Page 147: Local I2C Buses

    Local I2C Buses Buses Local I2C Buses The board provides two local I2C buses, the Discovery and the SENTINEL I2C bus. Discovery I2C Bus The Discovery I2C bus provides access to board information memory devices of the board itself and attached accessories like an RTB or PMC modules.
  • Page 148: Sentinel I2C Bus

    Buses Local I2C Buses Figure 18: Connection to I2C Devices SENTINEL I2C Bus This bus connects the SENTINEL with the SROM for configuration regis- ters. A 24C04 device with 4 KBytes is used. PPC/CPCI-690 5 - 19...
  • Page 149 Local I2C Buses Buses 5 - 20 PPC/CPCI-690...
  • Page 150: Maps And Registers

    Maps and Registers...
  • Page 152: Overview

    Maps and Registers Overview Overview This section gives an overview on the memory maps and describes all board-specific registers. Table 24: Register Overview Register Description Last Reset Status register 1 Page 6-14 Last Reset Status register 2 Page 6-15 LED Control register Page 6-10 Memory Configuration register Page 6-13...
  • Page 153: Address Maps

    Address Maps Maps and Registers Address Maps The address map is determined by the system controller’s internal struc- ture. Each address window must have an address space larger than 1 MByte. Caution Board malfunction Accesses to the reserved address areas and overlapping of address win- dows result in unpredictable board behavior.
  • Page 154: Table 26 Pci Memory Address Map

    Maps and Registers Address Maps The PCI memory address map only differs from the processor memory map in the two PCI address windows. Table 26: PCI Memory Address Map Base Address End Address Size Device Bus Width 00000000 7FFFFFFF See Table 25 “Processor Memory Address Map” 80000000 EF7FFFFF 1784 MByte...
  • Page 155: Interrupt Map

    Interrupt Map Maps and Registers Interrupt Map The PowerPC 750FX/750GX processor provides three low active interrupt inputs that are driven by the system controller: • MCP# - machine check interrupt (NMI#) • SMI# - system management interrupt • INT# - standard CPU interrupt The MCP# interrupt has highest priority followed by SMI# and INT#.
  • Page 156: Table 29 System Controller Mpp Configuration

    Maps and Registers Interrupt Map Table 28: MPP and GPP Register Settings Register Address Data MPP Control 2 F100F008 00000000 MPP Control 3 F100F00C 00000000 GPP I/O Control F100F100 00000000 GPP Level Control F100F110 FFC7C000 The following table gives an overview on the MPP configuration for the board.
  • Page 157: External Interrupt Sources

    Interrupt Map Maps and Registers Table 29: System Controller MPP Configuration (cont.) Function Description Direction Polarity GNT0[4]# PCI bus 0 GNT# Output Active low REQ1[3]# PCI bus 1 REQ# Input Active low GNT1[3]# PCI bus 1 GNT# Output Active low REQ1[2]# PCI bus 1 REQ# Input...
  • Page 158 Maps and Registers Interrupt Map Table 30: External Interrupt Sources (cont.) Interrupt Description Source Polarity [18] EJECT_INT# Interrupt from the hot- Hot-swap switch Active low swap switch that is inte- grated into the lower han- dle of the front panel. The interrupt only is asserted if the board is installed into a PSB backplane without...
  • Page 159: Register

    Register Maps and Registers Register The board provides a set of 8-bit wide board-specific registers. The registers can be used by software to read board-specific status and configuration data. Software can also write to some registers to generate a software reset or to set the two user LEDs.
  • Page 160: Software Reset Register

    Maps and Registers Register Table 31: LED Control Register (cont.) Base Address: F0000000 Offset: 00 Signal Description Access Reserved Reserved 0: Default Software Reset Register The Software Reset register enables you to reset the board via software. Table 32: Software Reset Register Base Address: F0000000 Offset: 01 Signal...
  • Page 161: Switch Status Register

    Register Maps and Registers Switch Status Register The Switch Status register shows the status of the configuration switches SW2 and SW4. Table 34: Switch Status Register Base Address: F0000000 Offset: 03 Signal Description Access SW2_BOOT_SELECT 0: Boot flash 0 is selected (switch is OFF) 1: Boot flash 1 is selected (switch is ON) SW2_BOOT_WE 0: Boot flash write protected (switch is OFF)
  • Page 162: Memory Configuration Register

    Maps and Registers Register Memory Configuration Register The Memory Configuration Register provides information on memory con- figuration options. Table 35: Memory Configuration Register Base Address: F0000000 Offset: 04 Signal Description Access 2..0 SDRAM_SIZE SDRAM configuration 000: Reserved 001: 256 MByte 010: 512 MByte 011: 768 MByte 100: 1 GByte...
  • Page 163: Last Reset Status Register 1

    Register Maps and Registers Last Reset Status Register 1 The Last Reset Status register 1 provides information on the type of the last hardware reset. Table 36: Last Reset Status Register 1 Base Address: F0000000 Offset: 05 Signal Description Access PON_RST Power-on reset 0: This type was not reason for last reset.
  • Page 164: Last Reset Status Register 2

    Maps and Registers Register Last Reset Status Register 2 The Last Reset Status register 2 provides information on the type of the last hardware reset. Table 37: Last Reset Status Register 2 Base Address: F0000000 Offset: 06 Signal Description Access SW_RST Software requested board reset 0: This type was not reason for last reset.
  • Page 165 Register Maps and Registers 6 - 16 PPC/CPCI-690...
  • Page 166: Battery Exchange

    Battery Exchange...
  • Page 168 Battery Exchange The battery provides a data retention of ten years summing up all periods of actual battery use. Motorola therefore assumes that there usually is no need to exchange the lithium battery except for exchange in case of long- term spare part handling.
  • Page 169: Remove Battery

    Battery Exchange In order to exchange the battery, follow the instructions below: 1. Remove board from backplane Board Installation” page 2-16. For board removal procedure, see “ 2. Remove battery 3. When installing new battery, ensure that dot on battery is in cor- rect position (see figure below).
  • Page 170: Troubleshooting

    Troubleshooting...
  • Page 172: Error List

    Troubleshooting Error List A typical CompactPCI system is highly sophisticated. This chapter can be taken as a hint list for detecting erroneous system configurations and strange behaviors. It cannot replace a serious and sophisticated pre- and post- sales support during application development. If it is not possible to fix a problem with the help of this chapter, contact your local sales representative or FAE for further support.
  • Page 173 Troubleshooting Problem Possible Reason Solution Board defect Replace board Damaged plugs, bent or 1. Check CompactPCI slot broken pins: backplane position to be used for defect bent or broken pins 2. Replace backplane During Boot-Up Procedure Problem Possible Reason Solution Board does not boot Boot device is not parti- Check partition according to...
  • Page 174 Troubleshooting Problem Possible Reason Solution Wrong board configura- Configure the board correctly tion, faulty switch setting for the respective device Devices are disabled Configure board correctly 1. Check that tempera- Board runs unstable Disregard of environmental requirements ture inside system stays within specified ranges for all system devices 2.
  • Page 175 Troubleshooting Problem Possible Reason Solution RTB does not work RTB defect Replace RTB RTB installed on wrong slot Install RTB on adjacent slot position position of the used board. RTB not defined for the Install RTB defined for the used peripheral or system used peripheral or system board board.
  • Page 176: Index

    Index Blind panel .........2-8, 2-9, 2-11 Temperature ........2-5, 2-6 Temperature sensor ......5-16, 5-17 Carrier PMC modules ......2-12 ............ 3-7, 3-9 Watchdog ........4-7, 4-20, 5-5 CompactFlash disk ........2-12 Enable ........4-12, 4-26 ......2-16, 3-3 ..........6-7 Compatibility glyph Interrupt ............
  • Page 177 I - 2 PPC/CPCI-690...

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