Texas Instruments DS250DF210 Manual

DS250DF210 25-Gbps Multi-Rate 2-Channel Retimer
1 Features
• Dual-channel multi-rate retimer with integrated
1
signal conditioning
• All channels lock independently from 20.6 to 25.8
Gbps (including sub-rates such as 10.3125 Gbps,
12.5 Gbps, and more)
• Ultra-low latency: <500 ps Typical for 25.78125-
Gbps data rate
• Single power supply, no low-jitter reference clock
required, and minimal supply decoupling to reduce
board routing complexity and BOM cost
• Adaptive Continuous Time Linear Equalizer
(CTLE)
• Adaptive Decision Feedback Equalizer (DFE)
• Integrated 2 x 2 cross point
• Low-jitter transmitter with 3-Tap FIR filter
• Combined equalization supporting 35+ dB channel
loss at 12.9 GHz
• Adjustable transmit amplitude: 205 mVppd to
1225 mVppd (typical)
• On-Chip Eye Opening Monitor (EOM), PRBS
pattern checker and generator
• Small 6-mm × 6-mm BGA package with easy flow-
through routing
Slave mode
2.5V
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Product
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Simplified Schematic
RX0P
RX
RX0N
RX1P
RX
RX1N
VDD
SMBus
1 NŸ
EN_SMB
NC_TEST
25 MHz
CAL_CLK_IN
SMBus Slave
READ_EN_N
mode
VDD
1 F 0.1 F
(2x) (4x)
(1) SMBus signals need to be pulled up elsewhere in the system.
Tools &
Technical
Software
Documents
SNLS561B – FEBRUARY 2017 – REVISED OCTOBER 2019
2 Applications
• Jitter cleaning for front-port optical
• Active cable assemblies
• Backplane and mid-plane reach extension
• IEEE802.3bj 100GbE, Infiniband EDR, and OIF-
CEI-25G-LR/MR/SR/VSR electrical interfaces
• SFP28, QSFP28, CFP2/CFP4, CDFP
3 Description
The DS250DF210 device is a two-channel, multi-rate
retimer with integrated signal conditioning. It is used
to extend the reach and robustness of long, lossy,
crosstalk-impaired, high-speed serial links while
achieving a bit error rate (BER) of 10
Each channel of the DS250DF210 independently
locks to serial data rates in a continuous range from
20.6 Gbps to 25.8 Gbps or to any supported sub-rate
(÷2 and ÷4), including key data rates such as 10.3125
Gbps and 12.5 Gbps, which allows the DS250DF210
to support individual lane Forward Error Correction
(FEC) pass-through.
PART NUMBER
DS250DF210
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
TX0P
CDR TX
TX0N
TX1P
CDR
TX
TX1N
2.5V or
3.3V
INT_N
(1)
SDA
(1)
SDC
ADDR0
ADDR1
CAL_CLK_OUT
ALL_DONE_N Float for SMBus Slave
mode, or connect to next
GHYLFH¶V 5($'_EN_N for
GND
SMBus Master mode
Support &
Community
DS250DF210
-15
or less.
(1)
Device Information
PACKAGE BODY SIZE (NOM)
ABM (101) 6.00 mm × 6.00 mm
To other open-drain
interrupt pins
To system
SMBus
Address straps
(pull-up, pull-
down, or float)
7R QH[W GHYLFH¶V
CAL_CLK_IN