Although most users will take advantage of the COM driver supplied with the PCI-COM422/485 boards, the
following register map (Table 4-1) has information for users that may require it.
4.1 REGISTER MAP OVE RVIEW
REGISTER
BADR1+4Ch
Interrupt Status
BADR2 + 0
BADR2 + 1
BADR2 + 2
BADR2 + 3
BADR2 + 4
BADR2 + 5
BADR2 + 6
BADR2 + 7
BADR3 + 0
BADR3 + 1
BADR3 + 2
BADR3 + 3
BADR3 + 4
BADR3 + 5
BADR3 + 6
BADR3 + 7
The single port PCI-COM422/485 board uses only Address range 1 and 2. The PCI-COM422/485/2 uses
4.2 REGISTER DESCRIP TIONS
4.2.1 INTERRUPT STATUS/CO NTROL
This register, and all 9052 registers, is 32 bits long. Since the remainder of the register has specific
control functions, they would need to be masked off in order to access the interrupt control functions:
Table 4-1. Register Map
READ FUNCTION
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 Clock Sel Register
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 Clock Sel Register
Address range 1, 2 and 3.
BADR1 + 4C hex
INTE is the Interrupt Enable:
0 = disabled, 1 = enabled (default).
INTPOL is the Interrupt Polarity:
0 = active low (default), 1 = active high.
INT is the Interrupt Status:
0 = interrupt is not active, 1 = interrupt is active.
WRITE FUNCTION
Interrupt Control
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Port 1 UART
Interrupt Status Register
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Port 2 UART
Interrupt Status Register
12
4. REGISTER MAP
Operations
32-bitDWORD
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
8-bit BYTE
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