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CE CONFORMITY CONDITIONS FOR CE CONFORMITY Since this product is a subassembly, it is the responsibility of the end user, acting as the system integrator, to ensure that the overall system is CE compliant. This product was demonstrated to meet CE conformity using a CE compliant crate housed in an EMI/RFI shielded enclosure.
CAUTION ELECTROSTATIC DISCHARGE PROTECTION The Model 1110 is shipped in ESD protective packaging. Do not remove the module from the anti-static packaging unless you are in a static-free environment. COOLING It is imperative that the Model 1110 VME ADC/TDC Tester be well cooled.
LeCroy are covered by the original equipment manufacturers' warranty only. In exercising this warranty, LeCroy will repair or, at its option, replace any product returned to the Customer Service Department or an authorized service facility within the warranty period, provided that the...
Products requiring maintenance should be returned to the Customer Service Department or authorized service facility. If under warranty, LeCroy will repair or replace the product at no charge. The purchaser is only responsible for the transportation charges arising from return of the goods to the service facility.
PRODUCT DESCRIPTION 2.1 INTRODUCTION The Model 1110 ADC/TDC Tester is a programmable Pulse Generator in a VME 6U x 160mm single width package, primarily designed as a test instrument for servicing VME ADCs and TDCs. START and STOP outputs are included for testing TDCs. The time difference between these outputs is programmable with a 16-bit DAC.
2.4.2 Charge Fanout Header The 1110 has a 16 channel fan-out. The signal pin is on left side of the connector; the right side is tied to ground. It is programmable in 4 ranges: 0 to 300 pC, 0 to 600 pC, 0 to 900 pC, and 0 to 1200 pC.
INSTALLATION GENERAL Before inserting the Model 1110 VME ADC/TDC Tester into any VME crate, the base address must first be set. The 8-position DIP switch defines the module VME address, decoded from address lines A16 to A24; e.g., for Address 0x00, set SW1 to SW8 to be CLOSED (UP at the OPEN end of switch).
OPERATING INSTRUCTIONS 4.1 VME ADDRESS MAP The Model 1110 occupies the following VME A24 address space (hexadecimal): Base address + 0x0000 to 0x0006 The internal memory map in hexadecimal is as follows: Base Address + 0x0000: Trigger Register Base Address + 0x0002: Width DAC Register...
For the timing output (numbers 1 and 2 above), the full scale width is 2400 ns, with an LSB of ~36.6 ps. The formula for calculating the appropriate DAC codes and output widths are: DAC Code = 65535 * (Desired Value in ns) / 2400 For the DAC output (number 3 above), the range is 0 to 10 V, with an LSB of ~0.15 mV.
5.1 1110 ADC/TDC TESTER The VME connector P1, located on sheet 1 of the schematic, contains all the signal and power supply lines used by the module, together with the derived power supplies.
(10000). Check for 1.2 µsec wide NIM Pulse at ‘GATE OUT’. 16. Loop checking for ‘START OUT’ to ‘STOP OUT’ timing of 1.2 µsec. 17. Connect ‘START OUT’ and ‘STOP OUT’ of the 1110 to the ‘START’ and ‘STOP’ of a HP5370B or similar Counter. Set the HP5370B as follows:...
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19. Program Width DAC to (0x0334). Write any data to Base Address (0x800000) and cycle by looping a number of times (10000). Adjust pot R104 for a reading of 30 nsec ±1 nsec. 20. Program the Q DAC to Min. Address 0x800004 set to 0xffff. 21.
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