Asus AAEON uCOM-ADN User Manual
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Asus AAEON uCOM-ADN User Manual

Asus AAEON uCOM-ADN User Manual

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uCOM-ADN
SMARC Module
st
User's Manual 1
Ed
Last Updated: April 29, 2024

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Summary of Contents for Asus AAEON uCOM-ADN

  • Page 1 uCOM-ADN SMARC Module User’s Manual 1 Last Updated: April 29, 2024...
  • Page 2 Copyright Notice This document is copyrighted, 2024. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgements All other products’ name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel® and Atom® are registered trademarks of Intel Corporation. ⚫ Intel® Core™ is a trademark of Intel Corporation. ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity uCOM-ADN ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ 连接器及线材 O：表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ/T 11363-2006 标准规定的限量要求以下。 X：表示该有毒有害物质至少在该部件的某一均质材料中的含量超出...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Block Diagram ......................4 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................9 Extra DC 5V Power in (BAT1) ................10 MXM Gold Finger (GF2) ..................10 Chapter 3 - AMI BIOS Setup ....................
  • Page 12 3.4.10 AAEON BIOS Robot .................. 38 3.4.10.1 Device Detecting Configuration ..........40 3.4.10.2 Device #* Detecting Configuration..........41 3.4.11 On-Module Configuration ............... 42 3.4.12 Power Management .................. 43 3.4.13 GPIO Port Configuration ................44 Setup Submenu: Chipset ..................45 3.5.1 System Agent (SA) Configuration ............46 3.5.1.1 Memory Configuration ..............

  • Page 13: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 14: Specifications

    Specifications System Form Factor SMARC Module Intel® Core™ i3-N305 Processor (8C/8T, up to 3.8 GHz, 15W) Intel Atom® x7425E Processor (4C, up to 3.4 GHz, 12W) Intel® Processor N97 (4C, up to 3.6 GHz, 12W) Chipset Integrated with Intel® SoC Memory Onboard LPDDR5x 4800MHz, up to 8GB Onboard Storage...
  • Page 15 Ethernet Intel® Ethernet Controller I226-V/IT, 2.5GbE x 2 Audio High Definition Audio Interface USB Port USB 2.0 x 6 USB 3.2 x 2 Serial Port 2-Wire UART x 2 (Tx/Rx) 4-Wire UART x 2 (Tx/Rx/RTS/CTS) HDD Interface SATA 6Gb/s x 1 Expansion PCIe Gen 3 [x1] x 3 (Max PCIe [x2] x 1) MIPI CSI x 2...

  • Page 16: Block Diagram

    Block Diagram Note: To get a fourth PCIe Gen 3 [x1] interface, please contact the AAEON support team. Chapter 1 – Product Specifications...

  • Page 17: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 18: Dimensions

    Dimensions Top Side Bottom Side Chapter 2 – Hardware Information...
  • Page 19 With Active Cooling (Part No: uCOM-ADN-FAN01) With Heatspreader (Part No: uCOM-ADN-HSP01) Chapter 2 – Hardware Information...
  • Page 20 With Heatsink (Part No: uCOM-ADN-HSK01) Chapter 2 – Hardware Information...

  • Page 21: Jumpers And Connectors

    Jumpers and Connectors Top Side Bottom Side Chapter 2 – Hardware Information...

  • Page 22: Extra Dc 5V Power In (Bat1)

    Extra DC 5V Power in (BAT1) Pin Name MXM Gold Finger (GF2) Pin Name Pin Name SMB_ALERT# CSI1_TX+/I2C_CAM1_CK CSI1_TX-/I2C_CAM1_DAT CSI1_CK+ CSI1_CK- RSVD GBE1_SDP CSI0_TX+/I2C_CAM0_CK GBE0_SDP CAM_MCK CSI_B_DP_0 CSI0_TX1/I2C_CAM0_DAT CSI_B_DN_0 CSI0_CK+ CSI0_CK- CSI_B_DP_1 CSI_B_DN_1 CSI_C_DP_0 CSI_C_DN_0 CSI_B_DP_2 CSI_B_DN_2 CSI_C_DP_1 CSI_C_DN_1 CSI_B_DP_3 CSI_B_DN_3 GBE1_MDI0+ GBE1_MDI0-...
  • Page 23 Pin Name Pin Name GBE0_LINK_ACT# GBE0_MDI1- GBE1_MDI3+ GBE0_MDI1+ GBE1_MDI3- GBE0_CTREF GBE1_CTREF GBE0_MDI0- PCIE_D_TX+/SERDES_0_TX+ GBE0_MDI0+ PCIE_D_TX-/SERDES_0_TX- SPI0_CS1# GBE1_LINK_ACT# PCIE_D_RX+/SERDES_0_RX+ SDIO_WP PCIE_D_RX-/SERDES_0_RX- SDIO_CMD SDIO_CD# USB4+ SDIO_CK USB4- SDIO_PWR_EN USB3_VBUS_DET AUDIO_MCK SDIO_D0 I2S0_LRCK SDIO_D1 I2S0_SDOUT SDIO_D2 I2S0_SDIN SDIO_D3 I2S0_CK SPI0_CS0# ESPI_ALERT0# SPI0_CK ESPI_ALERT1# SPI0_DIN MDIO_CLK SPI0_DO...
  • Page 24 Pin Name Pin Name ESPI_IO_0/SPI1_DO/QSPI_IO_0 ESPI_RESET# USB5+ USB0+ USB5- USB0- USB0_EN_OC# USB3_SSTX+ USB0_VBUS_DET USB3_SSTX- USB0_OTG_ID USB1+ USB3_SSRX+ USB1- USB3_SSRX- USB1_EN_OC# USB3+ USB2+ USB3- USB2- USB2_EN_OC# USB2_SSTX+ RSVD USB2_SSTX- RSVD USB3_EN_OC# USB2_SSRX+ PCIE_A_RST# USB2_SSRX- USB4_EN_OC# PCIE_B_RST# PCIE_B_CLKREQ# PCIE_C_RST# PCIE_A_CLKREQ# PCIE_C_RX+/SERDES_1_RX+ PCIE_C_RX-/SERDES_1_RX- PCIE_C_REFCK+ PCIE_C_REFCK- PCIE_C_TX+/SERDES_1_TX+...
  • Page 25 Pin Name Pin Name PCIE_B_TX- HDMI_D2+/DP1_LANE0+ HDMI_D2-/DP1_LANE0- DP0_LANE0+ DP0_LANE0- HDMI_D1+/DP1_LANE1+ DP0_AUX_SEL HDMI_D1-/DP1_LANE1- DP0_LANE1+ DP0_LANE1- HDMI_D0+/DP1_LANE2+ DP0_HPD HDMI_D0-/DP1_LANE2- DP0_LANE2+ P100 GND S100 DP0_LANE2- P101 HDMI_CK+/DP1_LANE3+ S101 P102 HDMI_CK-/DP1_LANE3- S102 DP0_LANE3+ P103 GND S103 DP0_LANE3- P104 HDMI_HPD/DP1_HDP S104 USB3_OTG_ID P105 HDMI_CTRL_CK/DP1_AUX+ S105 DP0_AUX+ P106 HDMI_CTRL_DAT/DP1_AUX- S106 DP0_AUX- P107 DP1_AUX_SEL...
  • Page 26 Pin Name Pin Name P124 BOOT_SEL1# S124 GND P125 BOOT_SEL2# S125 LVDS0_0+/eDP0_TX0+/DSI0_D0+ P126 RESET_OUT# S126 LVDS0_0-/eDP0_TX0-/DSI0_D0- P127 RESET_IN# S127 LCD0_BKLT_EN P128 POWER_BTN# S128 LVDS0_1+/eDP0_TX1+/DSI0_D1+ P129 SER0_TX S129 LVDS0_1-/eDP0_TX1-/DSI0_D1- P130 SER0_RX S130 GND P131 SER0_RTS# S131 LVDS0_2+/eDP0_TX2+/DSI0_D2+ P132 SER0_CTS# S132 LVDS0_2-/eDP0_TX2-/DSI0_D2- P133 GND S133 LCD0_VDD_EN P134 SER1_TX...
  • Page 27 Pin Name Pin Name S157 TEST# S158 GND Chapter 2 – Hardware Information...

  • Page 28: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 29: System Test And Initialization

    System Test and Initialization The module uses certain routines to test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.

  • Page 30: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This information is stored in the battery-backed CMOS RAM and BIOS NVRAM so it retains the Setup information when the power is turned off. To enter Setup, power on the computer and press <Del>...

  • Page 31: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 32: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 33: Cpu Configuration

    3.4.1 CPU Configuration Options Summary Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Intel® SpeedStep™ Disabled Enabled Optimal Default, Failsafe Default Allows more than two frequency ranges to be supported. Turbo Mode Disabled Enabled...

  • Page 34: Pch-Fw Configuration

    Options Summary Enable/Disable CPU Power Management. Allows CPU to go to C states when it’s not 100% utilized. Note: When using MIPI CSI under Ubuntu, please set C states to "Disabled" for better FPS performance. 3.4.2 PCH-FW Configuration Chapter 3 – AMI BIOS Setup...

  • Page 35: Firmware Update Configuration

    3.4.2.1 Firmware Update Configuration Options Summary Me FW Image Re-Flash Disabled Optimal Default, Failsafe Default Enabled Enable/Disable Me FW Image Re-Flash function. FW Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update function. Chapter 3 – AMI BIOS Setup...

  • Page 36: Ptt Configuration

    3.4.3 PTT Configuration Options Summary TPM Device Selection dTPM Optimal Default, Failsafe Default Selects TPM device: PTT or dTPM. PTT – Enables PTT in SkuMgr. dTPM 1.2 – Disables PTT in SkuMgr Warning! PTT/dTPM will be disabled and all data saved on it will be lost. Chapter 3 –...

  • Page 37: Trusted Computing

    3.4.4 Trusted Computing Options Summary Security Device Support Disable Enable Optimal Default, Failsafe Default Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA256 PCR Bank Disabled Enabled Optimal Default, Failsafe Default...
  • Page 38 Options Summary Platform Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Platform Hierarchy. Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy. Endorsement Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy. Physical Presence Spec Version Optimal Default, Failsafe Default...

  • Page 39: Sata Configuration

    3.4.5 SATA Configuration Options Summary SATA Controller(s) Disabled Enabled Optimal Default, Failsafe Default Enable/Disable SATA Device. Port 0 Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port. Hot Plug Disabled Optimal Default, Failsafe Default Enabled Designates this port as Hot Pluggable. Chapter 3 –...

  • Page 40: On-Module H/W Monitor

    3.4.6 On-Module H/W Monitor Fan Mode: Full Mode Options Summary System Fan Full Mode Optimal Default, Failsafe Default Manual Mode Auto – Slope Linear System Fan mode Select. Chapter 3 – AMI BIOS Setup...
  • Page 41 Fan Mode: Manual Mode Options Summary System Fan Full Mode Manual Mode Optimal Default, Failsafe Default Auto – Slope Linear System Fan mode Select. PWM Setting The PWM value of manual mode. Range: 0 – 100. Chapter 3 – AMI BIOS Setup...
  • Page 42 Fan Mode: Auto – Slope Linear Options Summary System Fan Full Mode Manual Mode Auto – Slope Linear Optimal Default, Failsafe Default System Fan mode Select. PWM signal Non-inverting Optimal Default, Failsafe Default Inverting Select output PWM of inverting or non-inverting signal. Thermal Monitoring CPU Temperature Optimal Default, Failsafe Default...

  • Page 43: Sio Configuration

    Options Summary PWM turns off when monitored thermal sensor is less or equal to. Range: 0 – 100 START PWM The beginning PWM output value when Start-Up temperature is triggered. Slope (PWM) 0 (PWM) 1 (PWM) Optimal Default, Failsafe Default 2 (PWM) 4 (PWM) 8 (PWM)

  • Page 44: Serial Port 1

    3.4.7.1 Serial Port 1 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4; DMA; IO=2C8h; IRQ=11; DMA; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.

  • Page 45: Serial Port 2

    3.4.7.2 Serial Port 2 Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3; DMA; IO=2D8h; IRQ=10; DMA; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.

  • Page 46: Serial I/O Configuration

    3.4.8 Serial I/O Configuration Options Summary UART0 Controller (COM3) Disabled Communication port Optimal Default, Failsafe Default (COM) Set UART0 mode - DBG used for BIOS log print and/or Kernel OS Debug. - COM – 16550 compatible serial port with Power Gating support. UART1 Controller (COM4) Disabled Communication port...
  • Page 47 Options Summary Enables/Disables SerialIo Controller. If given device is Function 0 PSF disabling is skipped. PSF default will remain and device PCI CFG Space will still be visible. This is needed to allow PCI enumerator access functions above 0 in a multifunction device. The following devices depend on each other: I2C0 and I2C1,2,3 UART0 and UART1,SPI0,1...

  • Page 48: Serial Port Console Redirection

    3.4.9 Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Console Redirection EMS Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...

  • Page 49: Legacy Console Redirection Settings

    3.4.9.1 Legacy Console Redirection Settings Options Summary Redirection COM Port COM0 Optimal Default, Failsafe Default Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages. Resolution 80x24 Optimal Default, Failsafe Default 80x25 On Legacy OS, the Number of Rows and Columns supported redirection. Redirect After POST Always Enable Optimal Default, Failsafe Default...

  • Page 50: Aaeon Bios Robot

    3.4.10 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST Enabled Enabled - Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on completion of POST. WDT will reset system automatically if it is not cleared before its timer counts down to zero.
  • Page 51 Options Summary OS Timer (minute) Optimal Default, Failsafe Default Timer count set to Watch Dog Timer for OS loading. Delayed POST (PEI Disabled Optimal Default, Failsafe Default phase) Enabled Enabled - Robot holds BIOS from starting POST, right after power on. This allows BIOS POST to start with stable power or start after system is physically warmed-up.

  • Page 52: Device Detecting Configuration

    3.4.10.1 Device Detecting Configuration Options Summary Action Reset System Optimal Default, Failsafe Default Hold System Select action that robot should do. Soft or hard reset Soft Optimal Default, Failsafe Default Hard Select reset type robot should send on each boot. Retry-Count Optimal Default, Failsafe Default Fill retry counter here.

  • Page 53: 3.4.10.2 Device #* Detecting Configuration

    3.4.10.2 Device #* Detecting Configuration Options Summary Interface Disabled Optimal Default, Failsafe Default SMBUS Legacy I/O Super I/O MMIO Select interface robot should use to communicate with device. Chapter 3 – AMI BIOS Setup...

  • Page 54: On-Module Configuration

    3.4.11 On-Module Configuration Options Summary Battery Management Disabled Optimal Default, Failsafe Default One Battery Enable to support battery in ACPI OS by I2C_CK, I2C_DAT(B33, B34). Chapter 3 – AMI BIOS Setup...

  • Page 55: Power Management

    3.4.12 Power Management Options Summary Power Mode ATX Type AT Type Optimal Default, Failsafe Default Select system power mode. Restore AC Power Loss Last State Always On Always Off Optimal Default, Failsafe Default SIO Restore AC Power Loss: To decide the behavior after system power cut then re-supply. Note: The CMOS battery must present.

  • Page 56: Gpio Port Configuration

    Options Summary By Date: System will wake on the day with hr::min::sec specified. By Weekday: System will wake on the enabled weekday with hr::min::sec specified. Bypass: BIOS will not control RTC wake function. 3.4.13 GPIO Port Configuration Options Summary GPIO Port 7 - 12 Input Optimal Default, Failsafe Default Output...

  • Page 57: Setup Submenu: Chipset

    Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 58: System Agent (Sa) Configuration

    3.5.1 System Agent (SA) Configuration Options Summary VT-d Disabled Optimal Default, Failsafe Default Enabled VT-d capability. Chapter 3 – AMI BIOS Setup...

  • Page 59: Memory Configuration

    3.5.1.1 Memory Configuration Options Summary In-Band ECC Support Disabled Optimal Default, Failsafe Default Enabled Enable/Disable In-Band ECC. Will be enabled if memory has symmetric configuration. Chapter 3 – AMI BIOS Setup...

  • Page 60: Pch-Io Configuration

    3.5.2 PCH-IO Configuration Options Summary HD Audio Disabled Enabled Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disabled = HDA will be unconditionally disabled. Enabled = HAD will be unconditionally enabled. eMMC 5.1 Controller Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SCS eMMC 5.1 Controller.

  • Page 61: Hsio Configuration

    3.5.3 HSIO Configuration Options Summary PCIe Controller 1 Setting PCIE Controller are four Optimal Default, Failsafe Default PCIE Controller are two PCIE Controller Setting. PCIe Controller 1 reversal Non-Reversed Optimal Default, Failsafe Default Reversed PCIE LANE REVERSAL. Chapter 3 – AMI BIOS Setup...

  • Page 62: Pci Express Configuration

    3.5.4 PCI Express Configuration Chapter 3 – AMI BIOS Setup...

  • Page 63: Pci Express Root Port

    3.5.4.1 PCI Express Root Port * Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. Chapter 3 – AMI BIOS Setup...

  • Page 64: Setup Submenu: Security

    Setup Submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.

  • Page 65: Secure Boot

    3.6.1 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Secure Boot Mode Standard Custom...

  • Page 66: Key Management

    3.6.1.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Install factory default Secure Boot keys after the platform reset and while the System is in Setup mode. Restore Factory Keys Force system to user mode. Install factory default Secure Boot key databases.
  • Page 67 Options Summary Enroll Factory Defaults or load certificates from a file: 1. Public Key Certificate: a) EFI_SIGNATURE_LIST b) EFI_CERT_X509 (DER) c) EFI_CERT_RSA2048 (bin) d) EFI_CERT_SHAXXX 2. Authenticated UEFI Variable. 3. EFI PE/COFF Image (SHA256) Key Source: Factory, External, Mixed. Chapter 3 – AMI BIOS Setup...

  • Page 68: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or disables Quiet Boot option. LAN UEFI PXE Driver Disabled Optimal Default, Failsafe Default Enabled Enable/Disable LAN UEFI PXE Driver. Chapter 3 – AMI BIOS Setup...

  • Page 69: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 70: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 71: Drivers Download And Installation

    Drivers Download and Installation Drivers for the uCOM-ADN can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/ Download the driver(s) you need and follow the steps below to install them. Chipset Driver Open the folder where you unzipped the Chipset Drivers Run the SetupChipset.exe file in the folder Follow the instructions Drivers will be installed automatically...
  • Page 72 Install Audio Drivers Note: Ensure Intel Smart Sound Driver (v10.29.00.7919) is installed before the Realtek Audio driver (Realtek Audio 6.0.9034.2) Install Intel Smart Sound Driver Open the Audio folder Open the 10.29.00.8102 subfolder Follow the setup information within the file to manually install driver. Install Realtek Audio Driver Open the Audio folder Open the Realtek Audio 6.0.9034.2 folder...
  • Page 73 Install Camera Driver Open the Camera Drivers folder Follow the instructions in the setup guides provided to manually install driver(s) Chapter 4 – Driver Installation...

  • Page 74: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...

  • Page 75: I/O Address Map

    I/O Address Map Appendix A – I/O Information...

  • Page 76: A.2 Memory Address Map

    A.2 Memory Address Map Appendix A – I/O Information...

  • Page 77: A.3 Large Memory Address Map

    A.3 Large Memory Address Map Appendix A – I/O Information...

  • Page 78: A.4 Irq Mapping Chart

    A.4 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 79 Appendix A – I/O Information...
  • Page 80 Appendix A – I/O Information...
  • Page 81 Appendix A – I/O Information...
  • Page 82 Appendix A – I/O Information...
  • Page 83 Appendix A – I/O Information...
  • Page 84 Appendix A – I/O Information...
  • Page 85 Appendix A – I/O Information...
  • Page 86 Appendix A – I/O Information...

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