Aiwa XR-MD85 Service Manual page 43

Md/cd stereo system
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If
0" [Adis oaprinem DRAM
Cam
Pay mene ge
o| Seema DRAMeapientio
Fo | CaS oupaioesenel
DRAM
cs
Pin No.
Pin Name
wo
w
:
'E
o < "A na
A
A
p
Oo
a |x n w
e°]
Qa o
fs
X
aN NS}
Q > n
Address output to external DRAM.
S$ output to external DRAM
Write enable for external DRAM.
i
:
~
I
ata bus for external DRAM.
ata bus for external DRAM
em
| o
bes
Ea
Beal
za
is
iw]
08
11
OE
A09
D1
D2
D3
is
\o
is)
I
External VCO (784 fs) clock input.
Playback EFM full swing output. (L: VSS, H: VDD).
aA
En =
| ©
[=| mag
id
RA
avs
| = | Ame poncramey
za
ee
Internal VCO control voltage of the master PLL of playback digital PLL and of the
Phase comparison output to EFM decoder analog PLL.
recording EFM PLL.
ZS
Optical light volume's peak hold signal input.
AlntlLarat
ntna
SLND]
nth]
wo
Aa nN
wale
l/>/| >] Zz
Sl<lanl|a
> "|<
Hho
Phase comparison output to the master PLL of playback digital PLL and to the
recording EFM PLL.
~
Filter input to the master PLL of playback digital PLL and to the recording EFM PLL.
Filter output to the master PLL of playback digital PLL and to the recording EFM
FILI
an oOo
PLL.
On
CLTV
PEAK
BOTM
ABCD
FE
I
Focus error signal input.
vc
RB
SE
TE
NEN
WEN
Optical light volume's bottom hold signal input.
;
;
I
Optical light volume signal input.
nN wm
es
imi
[ a | Anite
nb
| 0 | Menc oni ok AD cowering
sep | — | ere
rc
AVSS
[eel Analog GND.
Le
Sled error signal input.
I
Tracking error signal input.
Auxiliary input 2.
eee)
Ss}le|s
~ rs
ete 4
AUX2
i aa
se
wn
57

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