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SFSY
Lo | Subcode frame sync signal output pin. Falls down when subcode enters standby.
Subcode read clock input pin. Schmidt input. (Be sure to connected to OV when not in
Pin to which external 16.9344 MHz crystal oscillator is connected.
Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of
crystal oscillator.
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CS
Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V
while it is not controlling.
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TESTI
Test signal input pin without built-in pull-down resistor. Be sure to connect to OV.
Note:
The same potential must be applied to the respective power supply terminals. (WDD, VVDD, LVDD, RVDD, XVDD)
55
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