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Circuit Diagrams and PWB Layouts
SSB: PNX8541: Control MIPS
1
2
PNX8541: CONTROL MIPS
B04E
A
EJTAG-TDI
EJTAG-TCK
EJTAG-TMS
EJTAG-TRSTN
EJTAG-TDO
SCL1
SDA1
SCL2
SDA2
B
SCL3
SDA3
+1V2-PNX8541
9HF8
BACKLIGHT-CONTROL
CTRL1-MIPS_LCD-PWR-ON
IRQ-PCI
9HF3
IRQ-CA
RXD-MIPS
TXD-MIPS
+3V3-PER
3HP8
IRQ-CA
C
10K
IHF9
BACKLIGHT-CONTROL
IRQ-PCI
D
IHFE
3HPD
SCL1
SCL-UP-MIPS
100R
IHFF
3HPE
SDA1
SDA-UP-MIPS
100R
IHFG
3HPF
SCL2
SCL-UP-MIPS
100R
IHFH
3HPG
SDA2
SDA-UP-MIPS
E
100R
3HPH
SCL3
SCL-SSB
SCL-SSB
100R
3HPJ
SDA3
SDA-SSB
SDA-SSB
100R
SDA-SSB
SCL-SSB
3139 123 6427.1
1
2
Q522.3E LA
3
4
7H00-4
PNX8541E1/M1/2414
MIPS C0NTROL
AK1
AJ26
TDI
RESET_SYS
AJ2
TCK
IHF6
AK3
AK26
TMS
EJTAG
27MHz_OUT
AJ3
TRST
AK2
TDO
AK27
SCL
AH27
I2C1
SDA
AK29
SCL
AK28
I2C2
SDA
AJ28
SCL
AJ27
I2C3
SDA
AE27
VPP_ID
T1
0
T2
1
T3
2
IHF7
G27
GPIO
3
E27
4
IHF8
D28
5
3HFY
+3V3-PER
10K
3HF1
10K
FHP2
3HPK
+3V3-PER
FHP5
2K2
3HPM
2K2
3
4
7.
59
5
6
+3V3-PER
RESET-SYSTEM
RESET-SYSTEM
3HF0
PCI-CLK-OUT
33R
PCI-CLK-OUT
IHF0
IHFA
3HF2
33R
IHFB
3HF4
33R
7HF1
CY2305S
3HFR
1
PCI-CLK-OUT
33R
FOR DIRECT I2C CNTRL TO
TUNER W/O MUX
5
6
7
8
+3V3-PER
IHFC
TO BE PLACED ON TOP LAYER
IHFD
7HF2
PDTC114EU
USE WHEN PCI CLK IS DIRECT FROM 8541
PCI-CLK-PNX8535
PCI-CLK-USB20
+3V3-PER
2HF5
10n
2HF6
100n
Φ
VDD
ZERO
2HF7
3
DELAY
1
10p
BUFFER
3HFK
2
PCI-CLK-PNX8535
2
REF
CLK
33R
5
RES
2HF8
15p
3
2HF1
7
4
10p
8
CLKOUT
GND
3HFN
PCI-CLK-USB20
33R
9HF1
SDA-SSB-MUX2
9HF2
SCL-SSB-MUX2
7
8
9
2HF1 D8
2HF2 C1
B04E
2HF5 C7
2HF6 C7
2HF7 D8
2HF8 D8
3HF0 A5
3HF1 D2
3HF2 B6
3HF3 A6
A
3HF4 C6
3HF9 A7
3HFK D8
3HFN D8
3HFR D6
3HFY C2
3HP8 C1
3HPD E1
3HPE E1
3HPF E1
3HPG E1
B
3HPH E1
3HPJ E1
3HPK E3
RESERVED
3HPM E3
6HF0 A7
7H00-4 A3
7HF1 C7
7HF2 B7
9HF1 E7
9HF2 E7
9HF3 C2
9HF4 C2
USE FOR PCI CLK
C
9HF8 B2
FHP2 E3
FHP5 E3
IHF0 B6
IHF6 A4
IHF7 C3
IHF8 C2
IHF9 C2
IHFA B7
IHFB C7
IHFC A7
IHFD A7
D
IHFE E1
IHFF E1
IHFG E1
IHFH E1
E
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