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Linear Technology LTC2430 Manual

20-bit no latency ∆σtm adcs with differential input and differential reference

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Summary of Contents for Linear Technology LTC2430

  • Page 1 Chipsmall Limited consists of a professional team with an average of over 10 year of expertise in the distribution of electronic components. Based in Hongkong, we have already established firm and mutual-benefit business relationships with customers from,Europe,America and south Asia,supplying obsolete and hard-to-find components to meet their specific needs.
  • Page 2 3-wire digital interface that is compatible with SPI and Gas Analyzers MICROWIRE protocols. Strain Gauge Transducers , LTC and LT are registered trademarks of Linear Technology Corporation. Instrumentation No Latency ∆Σ is a trademark of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation. Data Acquisition...
  • Page 3 LTC2430/LTC2431 ABSOLUTE AXI U RATI GS (Notes 1, 2) Supply Voltage (V ) to GND .......– 0.3V to 7V Digital Output Voltage to GND ..– 0.3V to (V + 0.3V) Analog Input Pins Voltage Operating Temperature Range to GND ......... – 0.3V to (V + 0.3V)
  • Page 4 LTC2430/LTC2431 CO VERTER CHARACTERISTICS denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Notes 3, 4) PARAMETER CONDITIONS UNITS 2.5V ≤ REF ≤ V – Input Common Mode Rejection DC , REF = GND, GND ≤...
  • Page 5 LTC2430/LTC2431 DIGITAL I PUTS A D DIGITAL OUTPUTS denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS UNITS 2.7V ≤ V ≤ 5.5V High Level Input Voltage 2.7V ≤...
  • Page 6 LTC2430/LTC2431 TI I G CHARACTERISTICS denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS UNITS External Oscillator Frequency Range 2000 EOSC µs External Oscillator High Period 0.25 µs...
  • Page 7 LTC2430/LTC2431 TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error Total Unadjusted Error Total Unadjusted Error = 5V, V = 5V) = 5V, V = 2.5V) = 2.7V, V = 2.5V) = 5V = 5V = 2.7V = 5V = 2.5V = 2.5V...
  • Page 8 LTC2430/LTC2431 TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs V RMS Noise vs Temperature (T RMS Noise vs V INCM = 2.5V = 5V = 5V – = GND = 5V = 5V – = 0V = GND = 0V...
  • Page 9 LTC2430/LTC2431 TYPICAL PERFOR A CE CHARACTERISTICS Full-Scale Error vs V Full-Scale Error vs V PSRR vs Frequency at V ±1.4V = 5V = 2.5V = 4.1V – – = GND = GND = 2.5V –20 – = GND = GND = GND = 0.5V...
  • Page 10 LTC2430/LTC2431 PI FU CTIO S (LTC2430) GND (Pins 1, 7, 8, 9, 10, 15, 16): Ground. Multiple ground SDO (Pin 12): Three-State Digital Output. During the Data pins internally connected for optimum ground current flow Output period, this pin is used as serial data output. When and V decoupling.
  • Page 11 LTC2430/LTC2431 PI FU CTIO S (LTC2431) SDO (Pin 8): Three-State Digital Output. During the Data Clock Operation mode. The Serial Clock Operation mode is Output period, this pin is used as the serial data output. determined by the logic level applied to the SCK pin at...
  • Page 12 Clocked by the on-chip oscillator, the LTC2430/ There is no latency in the conversion result. The data out- LTC2431 achieve a minimum of 110dB rejection at the line put corresponds to the conversion just performed.
  • Page 13 LTC2430/LTC2431 APPLICATIO S I FOR ATIO Power-Up Sequence to input leakage current increase rapidly. Within these lim- its, the LTC2430 or LTC2431 converts the bipolar differen- The LTC2430/LTC2431 automatically enter an internal – tial input signal, V = IN – IN , from –...
  • Page 14 BIT 19 BIT 0 “0” Hi-Z SLEEP DATA OUTPUT CONVERSION 2431 F03 Figure 3. Output Data Timing Table 2. LTC2430/LTC2431 Output Data Format Differential Input Voltage Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 …...
  • Page 15 50Hz or 60Hz is required or when the converter must be Table 3 summarizes the duration of each state and the synchronized with an outside source, the LTC2430 or achievable output data rate as a function of F LTC2431 can operate with an external conversion clock.
  • Page 16 SERIAL INTERFACE TIMING MODES states. The LTC2430/LTC2431’s 3-wire interface is SPI and When CS is HIGH, the SDO driver is switched to a high MICROWIRE compatible. This interface offers several impedance state. This allows sharing the serial interface flexible modes of operation.
  • Page 17 LTC2430/LTC2431 APPLICATIO S I FOR ATIO Table 4. LTC2430/LTC2431 Interface Timing Modes Conversion Data Connection Cycle Output Configuration Source Control Control Waveforms External SCK, Single Cycle Conversion External CS and SCK CS and SCK Figures 5, 6 External SCK, 2-Wire I/O...
  • Page 18 LTC2430/LTC2431 APPLICATIO S I FOR ATIO 2.7V TO 5.5V 1µF = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION LTC2430/ LTC2431 REFERENCE VOLTAGE – 0.1V TO V 3-WIRE SPI INTERFACE ANALOG INPUT RANGE –0.5V TO 0.5V – TEST EOC TEST EOC...
  • Page 19 LTC2430/LTC2431 APPLICATIO S I FOR ATIO 2.7V TO 5.5V 1µF = 50Hz REJECTION = EXTERNAL OSCILLATOR = 60Hz REJECTION LTC2430/ LTC2431 REFERENCE VOLTAGE – 0.1V TO V 2-WIRE I/O ANALOG INPUT RANGE –0.5V TO 0.5V – BIT 23 BIT 22...
  • Page 20 LTC2430/LTC2431 APPLICATIO S I FOR ATIO The serial data output pin (SDO) is Hi-Z as long as CS is If CS remains LOW longer than t , the first rising EOCtest HIGH. At any time during the conversion cycle, CS may be edge of SCK will occur and the conversion result is serially pulled LOW in order to monitor the state of the converter.
  • Page 21 10k pull-up resistor to the SCK pin. the SCK pin or by never pulling CS HIGH when SCK is LOW. Internal Serial Clock, 2-Wire I/O, Whenever SCK is LOW, the LTC2430/LTC2431’s internal Continuous Conversion pull-up at pin SCK is disabled. Normally, SCK is not exter- This timing mode uses a 2-wire, all output (SCK and SDO) nally driven if the device is in the internal SCK timing mode.
  • Page 22 During the conversion period, the undershoot and/or a minimum amount of time (1/2 the internal SCK period) overshoot of a fast digital signal connected to the LTC2430/ then immediately begins outputting data. The data output LTC2431 pins may severely disturb the analog to digital cycle begins on the first rising edge of SCK and ends after conversion process.
  • Page 23 1ppm, the driving source impedance should be chosen such that τ ≤ 13µs/14 = 920ns. When an external oscillator The input and reference pins of the converter (LTC2430 or LTC2431) are directly connected to a network of sampling of frequency f...
  • Page 24 = 0.01µF – = 1.25V parasitics of input multiplexers, wires, connectors or = GND sensors, the LTC2430 or LTC2431 can maintain its excep- = 25°C = 0.001µF tional accuracy while operating with relative large values = 100pF of source resistance as shown in Figures 13 and 14. These...
  • Page 25 LTC2430/LTC2431 APPLICATIO S I FOR ATIO The typical +FS and –FS errors as a function of the sum of (internal oscillator and 60Hz notch), every 1Ω mismatch – the source resistance seen by IN and IN for large values in source impedance transforms a full-scale common of C are shown in Figure 15.
  • Page 26 = LOW (internal oscillator and 60Hz notch), every – Reference Current 100Ω of source resistance driving REF or REF translates In a similar fashion, the LTC2430 or LTC2431 samples the – differential reference pins REF and REF transfering small = 0pF amount of charge to and from the external driving circuits thus producing a dynamic reference current.

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