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CLD-S360, CLD-S26C
Power pin for D/A converter
Connected to +5V.
35 | ACOM
Jitter correction control output for audio
Outputs signal that has a duty in accord with error amount generated at internal phase compirator. Used
w aS
to correct audio jitter.
36 | XPBV
V synchronization output for playback system
Outputs signal that has V synchronization separated from pin 50 (XPBCSY) signal at negative logic.
37 | XPBH
H synchronization output for playback system
Outputs signal that has H synchronization separated from pin 50 (XPBCSY) signal at negative. logic.
TBCLOCK | PLL LOCK detection signal
Outputs "H" when SPDL servo loop and TBC servo loop are locked.
39 | SLATCH _| Serial interface latch signal
Generates timing to latch data that was input to serial interface (latched at fall edge).
40 | SCLK
Serial interface CLK input
Inputs CLK for serial interface. SDATA value is read at rise edge.
41 | SDATA
Serial interface data input
Inputs data to serial interface.
42 | XRST
System reset
Initializes internal registers of IC at negative logic. (Schmitt trigger input)
43 | RTP
A/D converter top reference input
Inputs top reference voltage of A/D converter.
61
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