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CLD-S360, CLD-S260
BM LC78681E AC 802)
Servo-control & EFM Demodulation
@ Outline of Functions
1) If HF signal is input, slices HF signal at accurate level, and
converts it to EFM signal. After this compares the phase
with VCO, and regenerates an average 4.3218 MHz PLL
clock.
2) Controls rotation of spindle motor by the frame phase
difference signal generated from the playback clock and
reference clock.
3) Demodulates and converts EFM signal to 8-bit symbol
data.
@ Block Diagram
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LC78681 ,
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Slice level
VCO clock
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EF MIN g
control
oscillation
|
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clock control
|
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Synchronization
C2FCLK
FSEQ US
detection EFM
LRSY
demodulation
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C1, C2 error detection
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correction flag process
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COIN (53)
DAC OUT
RWC 6]
Servo-
_XTAL system
intertace
commander
timing generator
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4) Separates subcode from EFM demodulation signal, and
Outputs to external microprocessor.
5) Buffers EFM demodulation signal at internal ROM, and
performs jitter-absorption by disk rotation fluctuation of
+4 frames.
6) Performs unscramble and deinterleaving to rearrange EFM
demodulation signals in a specified order.
7) Detects and corrects error signals, and performs a flag
process (C1, double; C2, double correction system).
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