Integra PLA-50FP1 Manual page 78

Is the video signal of 1Vp-p applied to
Pins 124, 133,and 139 of IC6501?
Is the video signal of 1Vp-p applied to
Pins 1, 2, and 3 of the YU connector?
The YU connector cable or the circuits before the
VIDEO PWB are out of order.
Go to "Pictures and ON-screen display not available."
Are pulses of 3Vp-p applied to Pins 38, 39, and 40 of
the AD connector?
Are the horizontal/vertical sync signals of 3Vp-p available at
Pins 27 and 28 of IC9403, and the clock signals at Pin 31?
49K
Horizontal
Vertical
Are the signals of 3Vp-p applied to the signal input pins
(signal names: REV_LVDS, RODD_LVDS, etc.) of IC9403
and IC9404?
Is a correct display presented when the AD, or the PD, or the
PH cable is replaced?
Is a correct display presented when the MAIN PWB is
replaced?
Are normal outputs of 170V, 70V, and D+5V available in the
POWER unit?
The PDP module is out of order.
(1)-1
NO
1Vp-p
NO
1Vp-p
NO
YES
60Hz
Clock
YES
YES
NO
YES
YES
YES
The VCC+5V system, IC9501, and
peripheral circuits are out of order.
YES
The analog circuit of the MAIN PWB
is out of order.
NO
IC9402, IC9501, and peripheral circuits
are out of order.
NO
38M
NO
IC9000, IC9501, and peripheral circuits
are out of order.
YES
Each cable is defective.
YES
The MAIN PWB is out of order.
NO
Go to 1. "No power available" (P. 2).
12
IC9000, IC9501, and peripheral
circuit are out of order.