Operation - Linear Technology DC416 Demo Manual

operation

The conversion clock (CONV) is derived from the CLKIN
connector (J3) via a programmable divider.
The board is shipped with this divider set to divide by 80
(JP8 and JP9). In order for this converter to achieve its
maximum throughput of 250ksps, the data transfer time
must be completed in 1/f
that the SCLK be at 20MHz.
The programmable divider can be strapped for differ-
ent divide ratios if the required sample rate is less than
250ksps, allowing a greater percentage of the time avail-
able doing data transfer (divide ratio of less than 80), or
if a comparable SCLK rate is used, with a lower sample
rate (divide ratio greater than 80).
JP8 and JP9 are set to code 16–(divide ratio/16) or 11 in
the case of a divide ratio of 80.
The counter circuitry gates a sequence of 16 clock pulses
during CONV = 0. These can be observed on CLKOUT, or
if CONV is introduced externally, (remove JP4) the clock
pulses can be introduced via CLKIN (JP6 to pin 1, JP7 to
pin 1 if no inversion is required).
JP6 (pin 2–3) allows the use of the onboard LTC1799
oscillator. Note that this oscillator will not produce data
sheet performance unless the input frequency is quite low,
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SAMPLE CONV
DEMO MANUAL DC416
as the phase jitter of this oscillator will be transformed in
the presence of high slew rate signals into random noise.
If the amplitude of the signal falls off with increasing
frequency as many natural phenomena do, this oscillator
may produce acceptable results.
If you are under-sampling, or operating the converter near
Nyquist, it is important to have a low jitter clock source.
The data output DOUT is shifted into a pair of 74HC595
serial to parallel shift registers that have output holding
registers, and tri-stateable outputs. If you intend to in-
corporate the demo board into a prototype of a system,
ENABLEDATA can be used to gate the outputs onto a
16-bit bus. Alternatively, all of the signals can be produced
externally, and data can be read into a DSP via DOUT.
If you elect to use the on-board timing to clock data into a
slaved serial input port, you can use DOUT, CKOUT, along
with CONV as a busy signal or as a means of producing
a frame sync.
In the event that you do not have "coherent" signal sources
as described above, you can use windowing functions
to reduce the "leakage" effect that occurs in the Fourier
transform and get a reasonably accurate figure for SNR,
THD, SINAD and the levels of the various harmonics.
dc416f
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