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RTD2136N
5
Power
3.3VS
AVCC33
3.3VS
LVDS
R46
0_06
LVDS
R42
0_06
40mils
C18
40mils
C19
80mils
C10
LVDS
LVDS
LVDS
2.2u_6.3V_X5R_04
0.1u_10V_X7R_04
2.2u_6.3V_X5R_04
D
LVDS
R39
0_04
HPD
3,15
EDP_HPD
Modify,7/10 Max
LVDS
C22
0.1u_10V_X7R_04
DAUXn
3
EDP_AUXN
LVDS
C23
0.1u_10V_X7R_04
DAUXp
3
EDP_AUXP
EDP
R327
0_04
DP_AUX# 15
EDP
R328
0_04
DP_AUX 15
LVDS
C24
0.1u_10V_X7R_04
DRX0p
3
EDP_TXP_0
LVDS
C25
0.1u_10V_X7R_04
DRX0n
3
EDP_TXN_0
EDP
R324
0_04
DP_TXP0 15
EDP
R323
0_04
DP_TXN0 15
C
LVDS
C26
0.1u_10V_X7R_04
DRX1p
3
EDP_TXP_1
LVDS
C27
0.1u_10V_X7R_04
DRX1n
3
EDP_TXN_1
EDP
R326
0_04
DP_TXP1 15
EDP
R325
0_04
DP_TXN1 15
EDP
PANEL_PW M
EDP
R17
0_04
LVDS
R16
0_04
BRIGHTNESS_EC_PS
25
EDP_BRIGHTNESS
LVDS
R15
*100K_04
LVDS
B
follow common design,Ivy0420
Mode Configure Table(Power On Latch)
MODE_CFG0(PIN47)
0
1
0
X
EP MODE
MODE_CFG1(PIN48)
1
ROM ONLY MODE
EEPROM MODE
follow common design,Ivy0420
A
RTD2136 Supports three operation mode for system design.
Reserved 4.7K resistor pull up/low for mode selection
ROM ONLY Mode
: PIN47 4.7K pull low, PIN48 4.7K pull high
EP Mode
: PIN47 4.7K pull high, PIN48 4.7K pull low
EEPROM Mode
: PIN47 4.7K pull high, PIN48 4.7K pull high
5
4
3
VCCK_V12
LVDS
LVDS
DVCC33
C9
LVDS
80mils
C15
LVDS
0.1u_10V_X7R_04
0.1u_10V_X7R_04
U4
LVDS
HPD
1
DP_HPD
TEST_MODE
LVDS
R30
100K_04
2
TEST_MODE
DAUXn
3
AUX_CH_N
AVCC33
DAUXp
4
AUX_CH_P
5
DP_V33
C11
LVDS
6
DP_GND
RTD2136N
DRX0p
7
LANE0_P
0.1u_10V_X7R_04
DRX0n
8
LANE0_N
DRX1p
9
VCCK_V12
LANE1_P
DRX1n
10
LANE1_N
11
DP_V12
C12
LVDS
DP_REXT
12
DP_REXT
R47
0.1u_10V_X7R_04
LVDS
12K_1%_04
Note:
1. Cap should be closed to chip
PANEL_PW M 15
R18
10K_04
80mils
LVDS
VCCK_V12
DVCC33
LVDS
C8
C3
LVDS
LVDS
0.1u_10V_X7R_04
3.3VS
3.3VS
R29
R37
LVDS
LVDS
*4.7K_04
4.7K_04
LVDS CONNECTOR 2
LVDS
R28
R38
LVDS
4.7K_04
*4.7K_04
22
SMC_EDP_CLK
PIN47
PIN48
follow common design,Ivy0420
22
SMD_EDP_DAT
1- EEPROM with a size 8K-Byte
2- EEPROM device should be 2-byte addressing device
3- Slave address should configure as 0xA8
4
3
2
ENBLT
R21
LVDS
10K_04
LVDS
LVDS-L0N
LVDS-L0P
LVDS-L1N
Single link
LVDS-L1P
LVDS
LVDS-L2N
36
LVDS-LCLKN
LVDS-L2P
TXOC-
35
LVDS-LCLKP
LVDS-LCLKN
TXOC+
LVDS-LCLKP
34
TXO3-
33
LVDS-U0N
TXO3+
LVDS-U0P
32
LVDS-U0N
TXE0-
LVDS-U1N
31
LVDS-U0P
LVDS-U1P
TXE0+
30
LVDS-U1N
LVDS-U2N
TXE1-
LVDS-U2P
29
LVDS-U1P
TXE1+
LVDS-UCLKN
28
LVDS-U2N
LVDS-UCLKP
TXE2-
P_DDC_CLK
27
LVDS-U2P
TXE2+
P_DDC_DATA
26
LVDS-UCLKN
TXEC-
25
LVDS-UCLKP
TXEC+
LVDS
RTD2136N-CG
LVDS
6-03-02136-031
Dual Mode Regulator Configuration
2.2-uH(L)
0 Olm(R)
DVCC33
SWR
Connect
NC
LDO
NC
Connect
C2
Del L1,7/26 Tim
LVDS
SWR MODE
0.1u_10V_X7R_04
6-19-41001-019
LVDS_PLVDD_EN
15
follow common design,Ivy0420
Add follow
,7/10 Max
LDO MODE
C14
3.3VS
LVDS
PIN17
R24
0_06
1
LVDS
R48
R49
LVDS
LVDS
LVDS
Cap closed to PIN17
4.7K_04
4.7K_04
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[14] RTD2136N (EDP to LVDS)
[14] RTD2136N (EDP to LVDS)
[14] RTD2136N (EDP to LVDS)
Size
Size
Size
Document Number
Document Number
Document Number
6-71-N24G0-D02
6-71-N24G0-D02
6-71-N24G0-D02
A3
A3
A3
Date:
Date:
Date:
Monday, January 22, 2018
Monday, January 22, 2018
Monday, January 22, 2018
2
Schematic Diagrams
1
:33pcs
ENBLT 15
D
LVDS-L0N
15
LVDS-L0P 15
LVDS-L1N
15
LVDS-L1P 15
LVDS-L2N
15
LVDS-L2P 15
LVDS-LCLKN
15
LVDS-LCLKP
15
LVDS-U0N
15
Sheet 14 of 40
LVDS-U0P
15
LVDS-U1N
15
LVDS-U1P
15
RTD2136N
LVDS-U2N
15
LVDS-U2P
15
LVDS-UCLKN
15
C
LVDS-UCLKP
15
P_DDC_CLK
15
P_DDC_DATA
15
B
VCCK_V12
C13
LVDS
A
Rev
Rev
Rev
1.0
1.0
1.0
Sheet
Sheet
Sheet
of
of
of
41
41
41
14
14
14
1
RTD2136N B - 15
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