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Schematic Diagrams
Processor 6/9
D
Sheet 7 of 40
Processor 6/9
C
B
A
B - 8 Processor 6/9
5
4
U26G
C26
AVS_I2S0_MCLK
B25
AVS_I2S0_BCLK
C25
AVS_I2S0_WS_SYNC
SOC_GPIO159
C24
AVS_I2S0_SDI
B23
AVS_I2S0_SDO
M23
AVS_I2S1_MCLK
L21
AVS_I2S1_BCLK
SOC_GPIO163
Fn1 HDA
J21
AVS_I2S1_WS_SYNC
SOC_GPIO164
M21
Fn2 AVS_I2S2
AVS_I2S1_SDI
P23
AVS_I2S1_SDO
R377
33_1%_04
A22
17
HDA_BITCLK
AVS_HDA_BCLK
C23
R383
33_1%_04
17
HDA_SYNC
AVS_HDA_WS_SYNC
B21
17
HDA_SDIN0
AVS_HDA_SDI
R382
33_1%_04
C22
17
HDA_SDOUT
AVS_HDA_SDO
R375
33_1%_04
C21
17
HDA_RST#
AVS_HDA_RST
CLOSE TO SOC
B19
AVS_DMIC_CLK_A1
SOC_GPIO172
C20
AVS_DMIC_CLK_B1
C19
AVS_DMIC_DATA_1
SOC_GPIO174
C18
AVS_DMIC_CLK_AB2
SOC_GPIO175
A18
AVS_DMIC_DATA_2
J13
11
EMMC_CLK
EMMC_CLK
L15
11
EMMC_STROBE
EMMC_RCLK
M19
11
EMMC_DAT0
EMMC_D0
H19
11
EMMC_DAT1
EMMC_D1
J19
11
EMMC_DAT2
EMMC_D2
P17
11
EMMC_DAT3
EMMC_D3
P19
11
EMMC_DAT4
EMMC_D4
J15
11
EMMC_DAT5
EMMC_D5
L17
11
EMMC_DAT6
EMMC_D6
M17
11
EMMC_DAT7
EMMC_D7
M13
11
EMMC_CMD
EMMC_CMD
EMMC_RST#
U44
11
EMMC_RST#
EMMC_RST
G51
11
EMMC_PW R_EN_N
EMMC_PWR_EN
EMMC_RCOMP
L13
EMMC_RCOMP
R131
200_1%_04
0927 ES only
Hardware Straps (5)
R379
*249_1%_04
HDA_SYNC
HDA_SDIN0
GPIO_159,164
Ensure that this strap is pulled LOW when RSM_RST_N
de-asserts for normal platform operation.
6-13-24901-28B
R378
Internal PD 20K CMOS
SOC_GPIO159
*680_1%_04
SOC_GPIO164
Internal PD 20K CMOS
6-13-68001-28C
3.3VA
EMMC_PW R_EN_N
R148
10K_04
5
4
3
RSVD6
RSVD
RSVD5
RSVD7
RSVD8
AUDIO-AVS
RSVD9
RSVD3
RSVD4
RSVD2
RSVD10
RSVD1
LPC_CLKOUT0
LPC_CLKOUT1
LPC/eSPI
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLKRUN
LPC_FRAME
LPC_SERIRQ
FST_SPI_CLK
FST_SPI_MOSI_IO0
FST_SPI_MISO_IO1
eMMC
FAST_SPI
FST_SPI_IO2
FST_SPI_IO3
FST_SPI_CS0
FST_SPI_CS1
7 OF 13
1.8VA
NC1
SHORT
C304 0.1u_16V_Y5V_04
Modify,9/23 Max
SMBus 1.8V/3.3V mode select
1=buffers set to 1.8V mode
0=buffers set to 3.3V mode (default)
Internal PD 20K CMOS
SOC_GPIO163
PMU (Power Management Unit) 1.8V/3.3V mode select
1=buffers set to 1.8V mode
0=buffers set to 3.3V mode (default)
HDA_SDIN0
Internal PD 20K CMOS
SMBus No Re-Boot
1 = Enable
0 = Disable (default)
SOC_GPIO172
Internal PD 20K CMOS
VDD2 1.24V vs. 1.20V select
1=VDD2 is 1.24V;
0=VDD2 is 1.20V (default)
SOC_GPIO174
Internal PD 20K CMOS
eSPI vs. LPC
1=eSPI mode;
0=LPC mode (default)
SOC_GPIO175
Internal PD 20K CMOS
3
2
1
L29
M29
P29
M27
P27
L27
L25
P25
Add,8/7 Max
L23
J25
Modify,7/10 Max
C37
LPC_CLKOUT0
R395
33_04
PCLK_KBC
22
LPC_CLKOUT1
A38
R396
33_04
PCLK_TPM 19
TPM
A34
W/O TPM
LPC_AD0
19,22
C34
LPC_AD1
19,22
B35
LPC_AD2
19,22
C35
Add,7/27 Max
LPC_AD3
19,22
R318
8.2K_04
1.8VA
C33
ECCLKRUN#
22
B33
LPC_FRAME#
19,22
B37
SERIRQ
19,22
1.8VA
R20
10K_04
B29
SOC_SPI_CLK
R390
33_04
SPI_SCLK
B31
SOC_SPI_D0_MOSI
SPI_SI
R392
0_04
C30
SOC_SPI_D1_MISO
R385
0_04
SPI_SO
A30
SOC_SPI_D2_W P
R391
0_04
SPI_W P#
SOC_SPI_D3_HOLD
SPI_HOLD#
C29
R384
0_04
C31
SOC_SPI_CS0#
R393
0_04
SPI_CS0#
C32
Modify TPM,7/19 Max
SPI_* <= 5"
BIOS ROM
R338
*3.3K_1%_04
64Mbit
U21
SPI_VDD
SPI_SI
8
5
VDD
SI
R339
2
SPI_SO
SO
3.3K_1%_04
SPI_W P#
SPI_CS0#
3
1
WP#
CE#
R340
6
SPI_SCLK
SCK
3.3K_1%_04
SPI_HOLD#
7
4
HOLD#
VSS
MX25U6435F
PCB Footprint = ACA-SPI-004-T03
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[07] GKL SOC_6/9_LPC,eMMC,SPI
[07] GKL SOC_6/9_LPC,eMMC,SPI
[07] GKL SOC_6/9_LPC,eMMC,SPI
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
6-71-N24G0-D02
6-71-N24G0-D02
6-71-N24G0-D02
A3
A3
A3
2.0
2.0
2.0
Date:
Date:
Date:
Monday, January 22, 2018
Monday, January 22, 2018
Monday, January 22, 2018
Sheet
Sheet
Sheet
7
7
7
of
of
of
41
41
41
2
1
D
C
B
A
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