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S
S
6010L
UPER
ERVER
PS/2 KB/
J28
MOUSE
NIC1
NIC2
J14
J15
J11
JP8
J12
JP24
Also see the figure on page 5-5 for the locations of the I/O ports and
5-4 for the Front Control Panel (JF1) connectors.
Manual
Figure 5-7. SUPER 370DLR+ Layout
(not drawn to scale)
ATX POWER
FCPGA
Processor
FCPGA
Processor
1
PCI64 #1
PCI64 #2
PCI 1
PCI 2
ATI
RAGE
XL
5-10
10.5"
NORTH
BRIDGE
JP2
SW1
1
JP1
AIC-
7892
SOUTH
BRIDGE
BIOS
JP7
JF1
J23
J26 J24
JP7
JP11
WOM
SUPER
1
I/O
JA1
JBT1
1
SLED
WOL
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