Block Diagram; Cdce(L)9Xx Simplified Block Diagram (Default Setup) - Texas Instruments CDCE 9 Series User Manual

Performance evaluation module
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Block Diagram

1
Block Diagram
5V
From Notebook / PC
* set J25 to activate serial interface
Figure 1. CDCE(L)9xx Simplified Block Diagram (Default Setup)
1.1
Features
Easy-to-use evaluation module for fast prototyping and application evaluation, supporting the entire
clock family.
Easy and fast device programming through TI Pro-Clock™ software
Evaluation of multiple crystals and reference clocks due to flexible input structure
EVM completely USB powered in factory default
Option for USB power and external power supply
No need for programming or notebook/PC connection
2
CDCE(L)9xx Performance Evaluation Module
1.8V LDO
(TI)
3.3V
Output
Supply
3.3V LDO
Selection
3.3V
(TI)
USB
SDA
Chip
+
SCL
*
Peripheral
(FTDI)
J39
(SCL active)
Open Jumper
Shorted Jumper
(for Default)
Y1 crystal
(default)
Copyright © 2007–2010, Texas Instruments Incorporated
1.8V
D1
Output
D3
Supply
Selection
2 way
solder
bridges
SDA / S1
J33
(SDA active)
SCL / S2
CDCE (L)9XX
J41
Universal Family
(S0 HIGH)
S0
Footprint
Xin/Clk
Xout
VCTR
SCAU022A – July 2007 – Revised July 2010
www.ti.com
1.8V
Core
D2
Supply
Selection
22 W
Y1
22 W
Y2
22 W
Y9

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Cdcel9 seriesCdce949evmCdce925evmCdce913evm

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