Clevo P670RG Series Service Manual page 93

PCH 9/9
5
NO REBOOT STARP
ENABLE: HIGH
U114J
(INTERNAL WEAK PD)
3.3VS
BD2
VSS
BD45
R638
VSS
BD44
VSS
BE44
*4.7K_04 VSS
D45
VSS
LPSS_GSPI0_MOSI A42
VSS
B45
VSS
B44
R637 VSS
A4
D
VSS
A3
*20K_04
VSS
B2
VSS
A2
VSS
B1
VSS
BB1
VSS
BOOT STARP BC1
VSS
ENABLE:LPC IS SELECT A44
VSS
(INTERNAL WEAK PD)
C1
RSVD
3.3VA D1
RSVD
R270
QJHT-S
*4.7K_04
LPSS_GSPI1_MOSI
R232
*20K_04
U114K
LPSS_GSPI1_MOSI AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
LPSS_GSPI0_MOSI BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
C GPP_B16
AW27
GPP_B16/GSPI0_CLK
GPP_B15 AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
3.3VS
UART2_CTS# AN43
D01A
GPP_C23/UART2_CTS#
DEBUG UART2_RTS# AN44
GPP_C22/UART2_RTS#
R727 *49.9K_1%_06 UART2_TXD AR39
TX -> D+
GPP_C21/UART2_TXD
UART2_RXD
R721 *49.9K_1%_06 AR45
RX -> D-
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
AJ44
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
QJHT-S
B
VDD3
U38A
74LVC08APW
1
55 VCCIO_PW RGD
3
2
13,35,42,46,48,54,55 SUSB#
A
ON
5
4 3
SPT-H_PCH
DFX TEST MODE QUALIFIER FOR OTHER
DFX STRAP WHEN SAMPLED LOW
(WEAK INTERNAL PU)
AR22 R213 *1K_04
RSVD
W13
RSVD
U13
RSVD
P31
RSVD
N31
RSVD
D01A
P27
RSVD
R27 Del test point
RSVD
N29
RSVD
P29
RSVD
AN29
RSVD
R24
RSVD
P24
RSVD
AT3 PCH_XDP_PREQ#_R
R563 *0_04
PREQ#
AT4 PCH_XDP_PRDY#_R R561 *0_04
PRDY#
AY5 H_TRST#_R R164 *0_04
CPU_TRST#
PCH_2_CPU_TRIGGER_R
AL2 R558 30.1_1%_04
PCH_TRIGOUT
AK1
PCH_TRIGIN
10 OF 12 REV = 1.3
SPT-H_PCH
AL44
GPP_D9
AL36
GPP_D10
AL35
GPP_D11
AJ39
TPM_DET 49
GPP_D12
AJ43
GPP_D16/ISH_UART0_CTS#
AL43
GPP_D15/ISH_UART0_RTS#
AK44
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
AK45
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
BC38
GPP_H20/ISH_I2C0_SCL
BB38
GPP_H19/ISH_I2C0_SDA
BD38
GPP_H22/ISH_I2C1_SCL
BE39
GPP_H21/ISH_I2C1_SDA
DGPU_PW M_SELECT#
BC22
GPP_A23/ISH_GP5
BD18
GPP_A22/ISH_GP4
BE21
GPP_A21/ISH_GP3
BD22
GPP_A20/ISH_GP2
BD21
GPP_A19/ISH_GP1
BB22 SB_BLON
GPP_A18/ISH_GP0
BC19
GPP_A17/ISH_GP7
11 OF 12 REV = 1.3
VDD3
VDD3
U38B
74LVC08APW
D02
4
61 VCORE_PG
DELAY_PW RGD
R1889 *0_04 6 9
5
63 VCCGT_PG
ALL_SYS_PW RGD 10
ALL_SYS_PW RGD
ALL_SYS_PW RGD 5,13,48,61,63
TO VR_ON & EC
R628 C837
10K_04 *0.1u_10V_X7R_04
3,9,10,11,12,13,14,15,16,17,32,34,35,36,37,38,43,44,45,46,48,49,50,51,54,59,61,63
4 3
2
H_PREQ# 5
H_PRDY# 5
H_TRST# 5
PCH_2_CPU_TRIGGER 7
CPU_2_PCH_TRIGGER 7
BOARD_ID[2:1]
P650Rx, P655Rx:00
P670Rx:10
3.3VS 3.3VS
P670Rx
R277
*10K_04
BOARD_ID1
BOARD_ID2
3.3VS
R292 R702
D03
*10K_04
D02 *10K_04
R1900
EDP: H
GSYNC: L 100K_04
D02
GSYNC_DET
R1900 R1873
R1873
*100K_04
EDP 100K_04 NC
D01A
G-SYNC NC 100K_04
3.3VS
3G_CONFIG0 43
3G_CONFIG1 43 DGPU_PW M_SELECT# R211 *10K_04
3G_CONFIG2 43
3G_CONFIG3 43
SB_BLON 13 VDD3
LTE_GPIO# 34
SB_BLON R595 *10K_04
VDD3
EC DELAY ALL_SYS_PWRGD 200ms
=PM_PWROK
48 PM_PW ROK
U38D
U38C 74LVC08APW
74LVC08APW 12
SYS_PW ROK_R
11 R612 1K_04
8 13
R605
10K_04
PM_PCH_PW ROK 35
! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/
Title Title Title
[40] PCH 10_11/12-UART/I2C/GPIO [40] PCH 10_11/12-UART/I2C/GPIO [40] PCH 10_11/12-UART/I2C/GPIO
5,32,33,34,35,36,38,54 3.3VA
Size Size Size Document Number Document Number Document Number
6-71-P65R0-D03 6-71-P65R0-D03 6-71-P65R0-D03
5,30,32,35,38,44,48,50,51,53,54,55,56,57,58 VDD3 A3 A3 A3 P650RE P650RE P650RE
3.3VS
Date: Date: Date: W ednesday, July 08, 2015 W ednesday, July 08, 2015 W ednesday, July 08, 2015
2
Schematic Diagrams
1
D
R671
*10K_04
Sheet 40 of 79
C
PCH 9/9
B
SYS_PW ROK 35
R611
*10K_04
A
Rev Rev Rev
D03 D03 D03
Sheet Sheet Sheet 40 40 40 of of of 79 79 79
1
PCH 9/9 B - 41