MSI KT4M Manual page 52

Ms-6596 (v1.x) m-atx mainboard
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BIOS Setup
DRAM Clock
Use this item to configure the clock frequency of the installed DRAM.
Settings options: By SPD, 100MHz, 133MHz, 166MHz.
DRAM Timing
The DRAM timing is controlled by the DRAM Timing Registers. The
Timings programmed into this register are dependent on the system
design. Slower rates may be required in certain system designs to sup-
port loose layouts or slower memory. Setting options: Manual, Auto By
SPD, Turbo, Ultra.
DRAM CAS Latency
This controls the timing delay (in clock cycles) before DRAM starts a
read command after receiving it. Settings: 1.5, 2, 2.5, 3 (clocks). 1.5
(clocks) increases the system performance the most while 3 (clocks) pro-
vides the most stable performance.
Bank Interleave
This field selects 2-bank or 4-bank interleave for the installed DRAM.
Disable the function if 16MB DRAM is installed. Setting options:
Disabled, 2 Bank, 4 Bank.
Precharge to Active (Trp)
This item allows you to control the number of DRAM clocks used for
DRAM parameter Trp. Trp specifies the minimum clock cycles required
for the precharge command to be transferred to the active command.
Setting options: 2T, 3T.
Tras Non-DDR400/DDR400
This item allows you to control the number of DRAM clocks used for
DRAM parameters Tras. Tras specifies the minimum clock cycles re-
quired for the active command to be transferred to the precharge
command. Setting options: 6T/8T, 7T/10T.
Active to CMD (Trcd)
This item allows you to control the number of DRAM clocks used for
DRAM parameters Trcd. Trcd specifies the minimum clock cycles re-
quired for the active command to be transferred to the re-active command.
Setting options: 2T, 3T.
3-13

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