Test Circuits - Analog Devices EVAL-AD5162SDZ User Manual

UG-348

TEST CIRCUITS

The EVAL-AD5162SDZ incorporates several test circuits to
evaluate the AD5162 performance.
DAC
RDAC1 can be operated as a digital-to-analog converter (DAC),
as shown in Figure 2.
AC + DC
V – V
DD SS
2
VDD
V
DD
A1
R34
RDAC1
A1
W1
B1
B1
R35
DC
V – V
DD SS
2
GND
Figure 2. DAC
Table 4 shows the options available for the voltage references.
Table 4. DAC Voltage References
Terminal Link Options
A1 A20 AC + DC
VDD
W1 BUF_W1
B1 A21 DC
GND
The output voltage is defined in Equation 1.
R
= − × WB1
V ( V V )
A1 B1
OUT
256
where:
R is the resistor between the W1 and B1 terminals.
WB1
V is the voltage applied to the A1 terminal (A20 link).
A1
V is the voltage applied to the B1 terminal (A21 link).
B1
However, by using the R34 and R35 external resistors, the user
can reduce the voltage of the voltage references. In this case, use
the A1 and B1 test points to measure the voltage applied to the
A0 and B0 terminals and recalculate V
W1
W1_BUF
BUF_W1
Description
Connects Terminal A1 to
(V − V )/2.
DD SS
Connects Terminal A1 to V
Connects Terminal W1 to an
output buffer.
Connects Terminal B1 to
(V − V )/2.
DD SS
Connects Terminal B1 to
analog ground.
and V in Equation 1.
A0 B0
AC Signal Attenuation
RDAC1 can be used to attenuate an ac signal, which must be
provided externally using the AC_INPUT connector, as shown
in Figure 3.
V
1µF
AC_INPUT
V
DD
Depending on the voltage supply rails and the dc offset voltage
of the ac signal, various configurations can be used as described
in Table 5.
Table 5. AC Signal Attenuation Link Options
Link Options
A20 AC + DC
.
DD
AC
A21 DC
GND
1 Recommended to ensure optimal total harmonic distortion (THD) performance.
The signal attenuation is defined in Equation 2.
(1)
Attenuatio
where:
R is the resistor between the W1 and B1 terminals.
WB1
R is the wiper resistance.
W
R is the end-to-end resistance value.
END-TO-END
In addition, R36 can be used to achieve a pseudologarithmic
attenuation. To do so, adjust the R36 resistor until a desirable
transfer function is found.
Rev. 0 | Page 4 of 16
EVAL-AD5162SDZ User Guide
– V
DD SS
2
AC + DC
AC
A1
R34
RDAC1
W1
A1
W1
BUF_W1
B1
R36
B1
R35
DC
– V
SS
2
GND
Figure 3. AC Signal Attenuator
Conditions
No dc offset voltage.
AC signal is outside the voltage supply rails
due to the dc offset voltage.
DC offset voltage ≠ V /2.
DD
All other conditions.
Use in conjunction with ac + dc link.
All other conditions.

+
R R

= × WB1
n ( dB ) 20 log

R

END − TO − END
W1_BUF
1


W
(2)

