Emulation Module Layout - Motorola M68EM05C0 User Manual

Emulation Module Layout

M68EM05C0UM/D
MOTOROLA
Freescale Semiconductor, Inc.
Figure 1 shows the layout of the M68EM05C0. Jumper header W1 lets
you select the clock-signal source. W2 configuration determines the port
D emulation source. Jumper header W3 selects muxed or non-muxed
mode emulation. Jumper header W4 controls internal read visibility. W5
determines where external memory resides.
Target connectors J2 and J3 are the interface to a target system; these
connectors use a separately purchased target cable assembly. When
you install the M68EM05C0 on the MMDS05, the target cable passes
through the slit in the station module enclosure. Connector J1 connects
to a logic analyzer.
DIN connectors P1 and P2 connect the EM and a development system
platform board.
P1
J1
Figure 1. M68EM05C0 Emulation Module
General Description
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W1
W2
W3
W4
W5
General Description

Emulation Module Layout

J2 J3
P2
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