Table of Contents
Advertisement
Internal Read
Visibility (IRV)
Header, W4
M68EM05C0UM/D
MOTOROLA
Freescale Semiconductor, Inc.
The internal read visibility jumper enables both the internal read visibility
(IRV) and load instruction register visibility (LIRV) bits of the
configuration register. That is, to emulate these bits being set or cleared,
you should configure this jumper appropriately instead of modifying the
associated bits in the configuration register (CNFGR).
NOTE:
In emulation, both bits are controlled by this one jumper and
are either both set or both cleared.
When the jumper is installed, internal read visibility is enabled. The RD,
WR, LIR and chip selects will be active during internal location accesses.
When the jumper is removed, the control signals will not be active for
internal location accesses.
When internal read visibility is disabled, the user should be aware of
functional differences between emulation and an MCU being used in a
user's system. In emulation, the address and data pins will continue to
be driven with the internal access address and data. When an MCU is
placed in a user's system and internal visibility is disabled, an internal
access will cause the address pins to be driven with the last accessed
external address. The data pins (or muxed address/data pins) are driven
to the last external data.
MMDS/MMEVS Configuration and Operation
For More Information On This Product,
Go to: www.freescale.com
MMDS/MMEVS Configuration and Operation
Setting M68EM05C0 Jumper Headers
W4
FABRICATED
JUMPER
IRV
IN = ENABLE
21
Advertisement
Table of Contents
