Analog Devices EVAL-AD7723CB Quick Start Manual page 3

J18-J23 Data pins DB0 to DB3, DB14 and DB15 are connected to links J18-J23. These pins are not used in
serial mode and should be tied to GND. Inserting the links ties these pins to GND. In parallel mode,
remove these links.
J24 When "in place" this link bypasses the 50
between the AD8047 op-amp and the signal source. This 440
and a 390
on the evaluation board can be bypassed.
J25-J28 These links are connected to pins TSI/DB10, SLP/DB11, SLDR/DB12 and SCR/DB13. When the
AD7723 is configured for parallel mode operation, links J25-J28 are removed as the above pins are
configured as digital outputs. When the AD7723 is configured for serial mode operation, the above pins
are configured as inputs and, are used to select the decimate by 16 mode, decimate by 32 mode (lowpass)
or bandpass mode. With a link in position "A", the corresponding pin is tied to AV
position "B" the corresponding pin is tied to GND. Consult Table 1 in the datasheet for information
on selecting the different modes.
J29 Set to position "A" to disable the on-chip crystal oscillator amplifier to allow use of an external clock
source. Set to position "B" when using an external crystal between the CLKIN and XTAL pins.
J30 Set link to position "A" to select the half power mode. With HALF-PWR set to 1, the AD7723 can be
operated with a CLKIN of 10MHz maximum. Otherwise set link to position "B".
J31 This link must always be set to position "B".
J32 Selects either bipolar or unipolar analog input range. Position "A" for unipolar operation and position
"B" for bipolar operation.
J33 Used to connect the A
J34 This link is tied to DV
to position "A" so that DV
input. In this mode, the link must be set to position "B" so that
J35 This selects the power source for the digital circuitry on the eval board. When it is removed, power must
be supplied via the 2-pin header P6. Power can be supplied from the EVAL-CONTROL BOARD when
this header is in place.
J36 J37 These links must be in place if using AD8041 op-amps. They connect the AD8041's
logic high.
REV. B
resistor. When a signal source which has a source resistance of 50
and D
GND GND
/ . In serial mode, this pin is configured as DV
DD
/ is tied high. In parallel mode, this pin operates as a Chip Select Digital
DD
resistor on the V
IN
planes.
– 3 –
EVAL-AD7723CB
socket, SK1. A 440 resistor is used
resistor is made up using a 50
is used, the 50
. With a link is
DD
. The link must be set
DD
is tied low.
resistor
present
pin to