3.6.3.2.1.3 PCI Express Root Port 8(JB2B1)
Item
PCI Express Root Port
8(JB2B1)
ASPM
L1 Substates
PCIe Speed
Option
Enabled[Default],
Disabled
Disabled[Default],
L0s
L1
L0sL1
Auto
Disabled
L1.1
L1.1 & L1.2[Default]
Auto[Default]
Gen1
Gen2
Gen3
ARC-1538 Quick Reference Guide 61
Quick Reference Guide
Description
Control the PCI Express Root Port.
Set the ASPM Level: Force L0s – Force all
links to L0s State AUTO – BIOS auto
configure DISABLE – Disables ASPM.
PCI Express L1 Substates settings.
Configure PCIe Speed.