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NPO:
00118/01:V977X.MUTX/01
Technical
Information
Manual
Revision n. 1
27 August 2004
MOD. V977
16 CHANNEL
I/O Register (Status A)
MANUAL REV.1

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Summary of Contents for Caen V977

  • Page 1 Technical Information Manual Revision n. 1 27 August 2004 MOD. V977 16 CHANNEL I/O Register (Status A) MANUAL REV.1 NPO: 00118/01:V977X.MUTX/01...
  • Page 2 User. It is strongly recommended to read thoroughly the CAEN User's Manual before any kind of operation. CAEN reserves the right to change partially or entirely the contents of this Manual at any time and without giving any notice.
  • Page 3: Table Of Contents

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 TABLE OF CONTENTS OVERVIEW ....................................5 1.1..............................5 ODULE DESCRIPTION SPECIFICATIONS ................................6 2.1..................................6 ACKAGING 2.2.............................6 XTERNAL COMPONENTS 2.3...............................7 NTERNAL COMPONENTS 2.4.
  • Page 4 Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 4.12...........................18 INGLEHIT READ CLEAR REGISTER 4.13..........................18 ULTIHIT READ CLEAR REGISTER 4.14............................18 EST CONTROL REGISTER 4.15................................19 NTERRUPT LEVEL 4.16.
  • Page 5: Overview

    1. Overview 1.1. Module description The Mod. V977 is a 1-unit wide VME module that can work either as 16 channel general purpose I/O Register or as Multihit Pattern Unit; the operating mode is selected via VME and is signalled via front panel LED.
  • Page 6: Specifications

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 2. Specifications 2.1. Packaging 1-unit wide VME unit. Height: 6U. 2.2. External components CONNECTORS: Function Logic Type Note connector 50 Ω impedance...
  • Page 7: Internal Components

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 2.3. Internal components SWITCHES (see Fig. 4.1): No.4, rotary switches for the module VME Base address selection. No.1 jumper for the output signal type selection (up: NIM, down: TTL).
  • Page 8: Front Panel

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 2.6. Front Panel Mod. V977 DTACK OUTPUT INPUT CONNECTORS CONNECTORS GATE PATTERN NIM/TTL STATUS A 16 CH I/O REGISTER PATTERN UNIT Fig. 2.1: Mod. V977 Front Panel...
  • Page 9: Operating Modes

    Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 3. Operating modes 3.1. Functional description The Mod. V977 is a 16 channel general purpose I/O Register or as Multihit Pattern Unit The following figure shows the simplified scheme of a single channel: CONTROL REGISTER...
  • Page 10: I/O Register Mode

    Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 3.1.1. I/O register mode The module operates as I/O register if the PATTERN bit of the CONTROL REGISTER is set to 0 (default setting).
  • Page 11: Test Channel

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 OUTPUT MASK OUTPUT SET VME REGISTER VME REGISTER PATTERN = 1 CH #n OUTPUT INPUT MASK MULTIHIT READ VME REGISTER VME REGISTER...
  • Page 12: Or Logic

    Also the TEST signal participates to the OR logic (it can also be masked). 3.3. Interrupter capability The Mod. V977 house a VME INTERRUPTER. The module responds to D16 Interrupt Acknowledge cycles providing a word whose 8 LSB are the STATUS/ID.
  • Page 13: Fig. 3.5: Interrupter Scheme

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 IRQ 1 FROM CHANNELS LOGIC FROM TEST CHANNEL LOGIC IRQ7 INTERRUPT LEVEL VME REGISTER Fig. 3.5: Interrupter scheme NPO: Filename: Number of pages: Page: 00118/01:V977X.MUTX/01...
  • Page 14: Vme Interface

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 4. VME Interface 4.1. Addressing capability The module works in A32/A24 mode. This means that the module address must be specified in a field of 32 or 24 bits. The Address Modifiers code recognized by the module...
  • Page 15: Input Set Register

    Base address bit <31~28> selection (SW2) Fig. 4.1: Mod. V977 Base address setting and output selection 4.3. Input set register (Base address + %0000 read/write) Each register’s bit corresponds to one channel. If one bit is set to 1 the relevant channel FLIP -FLOP (see §...
  • Page 16: Input Mask Register

    Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 4.4. Input mask register (Base address + %0002 read/write) Each register’s bit corresponds to one channel. If one bit is set to 1 , the related input signal is “masked”;...
  • Page 17: Output Set Register

    Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 4.8. Output set register (Base address + %000A read/write) Each register’s bit corresponds to one channel. If one bit is set to 1, the corresponding channel output is active, regardless the corresponding input connector’s and FLIP-...
  • Page 18: Singlehit Read-Clear Register

    Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 4.12. Singlehit read-clear register (Base address + %0016 read only) Each register’s bit corresponds to one channel. This is a different way to access the SINGLE HIT READ REGISTER: a read access to this register clears the first FLIP -FLOP (see §...
  • Page 19: Interrupt Level

    4.16. Interrupt vector (Base address + %0022 read/write ) This register contains the STATUS-ID that the V977 places on the VME data bus during the interrupt -acknowledge cycle (Bits 8 to 15 are meaningless ). 15 14 13 12 11 10 9...
  • Page 20: Dummy16

    Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 15 14 13 12 11 10 9 8 7 6 5 4 3 PATTERN GATE MASK OR MASK PATTERN BIT: read/write; = 0: the module works as I/O REGISTER (default setting);...
  • Page 21 Document type: Title: Revision date: Revision: User's Manual (MUT) Mod. V977 16 Channel I/O Register (Status A) 27/08/2004 References [1] VMEbus Specification Manual Revision C.1 October 1985 [2] VMEBus for Physics Application, Recommendations & Guidelines, Vita23-199x, draft 1.0, 22 May 1997.

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