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User Manual V2495 VME Programmable Logic Unit Rev. 5 - October 8th, 2024 V2495 VME Programmable Logic Unit User Manual UM5175...
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MyCAEN+ dashboard is designed to offer you a direct access to all our after sales services. Registration totally free, create account https://www.caen.it/become-mycaenplus-user and fill the registration form with your data. https://www.caen.it/become-mycaenplus-user/ User Manual UM5175...
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Purpose of this Manual This document contains the full hardware and software description of the V2495 VME Programmable Logic Unit. Change Document Record Date Revision Changes August 01 , 2016 Initial release October 11 , 2018 Removed “Coming Soon” from the User Firmware FW2495SC in Tab. 1.2. Corrected caption in Fig.
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VME Interface Registers (0x8000-0x80FF) ....................37 12.3.3 VME Control Register ............................37 12.3.4 VME Interrupt Level Register ..........................37 12.3.5 VME Interrupt Status ID Register ........................37 12.3.6 Scratch Register ..............................37 12.3.7 12.3.8 VME Base Address Register ...........................38 UM5175 – V2495 User Manual rev. 5...
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Fig. 8.1: PID location on the device (the number and board model in the pictures are purely indicative) ......25 Fig. 9.1: Mezzanine boards for the V2495 ............................26 Fig. 9.2: V2495 motherboard hosting the mezzanine boards .......................26 Fig. 9.3: Multi-pin connector pin assignment ..........................27 Fig.
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Fig. 13.5: Prefetch mechanism .................................46 Fig. 13.6: Gate and Delay parameters representation ........................47 List of Tables Tab. 1.1: Comparison table between V1495 and V2495 ......................10 Tab. 1.2: Table of models and related items ...........................11 Tab. 6.1: V2495 specifications table ..............................21 Tab.
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• WARNING: Indicates a hazardous situation that, if not avoided, could result in death or serious injury. • CAUTION: Indicates a situation or condition that, if not avoided, could cause physical injury, or damage the product and/or its environment. UM5175 – V2495 User Manual rev. 5...
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THIS DEVICE SHOULD BE INSTALLED AND USED BY A SKILLED TECHNICIAN ONLY OR UNDER HIS SUPERVISION DO NOT OPERATE WITH SUSPECTED FAILURES. IF YOU SUSPECT THIS PRODUCT TO BE DAMAGED, PLEASE CONTACT THE TECHNICAL SUPPORT UM5175 – V2495 User Manual rev. 5...
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CAEN Electronic Instrumentation CAUTION: this product needs proper cooling. USING V2495 WITH MEZZANINES REQUIRES CRATE WITH FORCED COOLING AIR FLOW SINCE OVERHEATING MAY DAMAGE THE MODULE (refer to Chap. 6) THE V2495 CANNOT BE OPERATED WITH VME8001 CAEN CRATES CAUTION: this product needs proper handling.
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UFPGA through an internal local bus. The presence of three expansion slots interfaced to the UFPGA allows to extend the channel interface of the V2495 by adding up to three independent mezzanine boards. Five mezzanine board types are available: A395A, A395B, A395C, A395D, A395E (see Tab.
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Tab. 1.2 lists the board models, the firmware and hardware related products as well as the ordering option information. Board Models Description V2495 VME64 Programmable Logic Unit 2495KITPRO V2495 + SW555PRO - Programmable Logic Unit & Sci-Compiler PRO Bundle Kit User Firmware Description FW2495SC Channel Latching Scaler for V2495 and DT5495 Related Products Description A3818A A3818A –...
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CAEN Electronic Instrumentation 2 Block Diagram USER LOCAL PROGRAMMABLE MAIN FPGA (MFPGA) FPGA 16 bit (UFPGA) Gate and Delay Generator Fig. 2.1: Block diagram UM5175 – V2495 User Manual rev. 5...
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B PORT (IN) / (Cyclone V GX) E PORT (IN/OUT) AD9520 FLASH G PORT (IN/OUT) FLASH 50 MHz C PORT (OUT) / Gate and Delay F PORT (IN/OUT) Generator Fig. 3.1: Main components and interconnections UM5175 – V2495 User Manual rev. 5...
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3.5 Gate and Delay Generator The V2495 hosts a Gate and Delay Generator (see Fig. 3.2) able to provide up to 32 gated and delayed signals (“delayed signals”) triggered by 32 inputs (“start signals”). The gate width and delay value are user programmable. The GDG is an external component implemented in a Xilinx Spartan-6 FPGA.
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VME DATA ACKNOWLEDGE LED CONFIGURATION LED ‘A’ CONNECTOR (32-ch input only) ‘B’ CONNECTOR (32-ch input only) USER CONFIGURATION LEDs G0, G1 CONNECTORS (Input/Output selectable) ‘C’ CONNECTOR (32-ch output only) Fig. 4.1: Front panels view UM5175 – V2495 User Manual rev. 5...
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CAEN Electronic Instrumentation USB PORT FUNCTION MECHANICAL SPECS MiniUSB connector to communicate with the Series: miniUSB connectors. V2495 by USB link for board configuration and Type: SD-54819-026 (B-type). firmware upgrade. Manufacturer: Molex Inc. ELECTRICAL SPECS CABLES N.A. A 1-m USB standard cable is included with the V2495 (USB A-type to miniUSB B-type).
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NOTE: when the UFPGA is in Factory mode, odd and even LEDs alternatively blink. LABELS Two blue labels on each insertion/extraction handle of the VME front panel report: − Manufacturer name and board’s model − Brief functional description UM5175 – V2495 User Manual rev. 5...
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5 Internal Connectors and LEDs MFPGA JTAG MEZZANINE SOCKETS MFPGA CONF_DONE LED UFPGA CONF_DONE LED UFPGA JTAG GDG CONF_DONE LEDs G-PORT TERMINATION SWITCHES POWER SUPPLY LEDS Fig. 5.1: On-board internal connectors and LEDs UM5175 – V2495 User Manual rev. 5...
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50-Ω termination according to the input or output direction and the NIM or TTL configuration relevant connector. • Position “ON” = 50 Ω termination enabled • Position “OFF” = termination disabled UM5175 – V2495 User Manual rev. 5...
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• SX LED on (orange): FPGA not programmed. POWER SUPPLY LEDs FUNCTION COLOR Two LEDs, placed under the Gate and Green. Delay Generator, light up if the 3.3V power supply for the digital circuitry is provided. UM5175 – V2495 User Manual rev. 5...
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Extended Common Mode input range: -4V to +5V Fail Safe input feature 0.1 A (max) @ +5V POWER CONSUMPTIONS +12V and -12V rails are not used Tab. 6.2: A395A Mezzanine specifications table UM5175 – V2495 User Manual rev. 5...
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+12V and -12V rails are not used Tab. 6.6: A395E Mezzanine specifications table A395C A395D OPERATING THE V2495 WITH MORE THAN ONE MEZZANINE BOARDS REQUIRES USING VME CRATES WITH FORCED COOLING AIR FLOW SINCE OVERHEATING DUE TO INSUFFICIENT VENTILATION MAY DAMAGE THE MODULE.
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7 Packaging and Compliancy The V2495 board is available in 1-unit wide VME 6U x 160mm form factor. The device is inspected by CAEN before shipment and it is guaranteed to leave the factory free of mechanical or electrical defects.
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DO NOT BUMP, DROP OR SLIDE SHIPPING CONTAINERS DO NOT LEAVE ITEMS OR SHIPPING CONTAINERS UNSUPERVISED IN AREAS WHERE PERSONNEL UNTRAINED MAY MISHANDLE THE ITEMS USE ONLY ACCESSORIES WHICH MEET THE MANUFACTURER'S SPECIFICATIONS UM5175 – V2495 User Manual rev. 5...
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8 PID (Product Identifier) PID is the CAEN product identifier, an incremental number greater than 10000 that is unique for each product. The PID is on a label affixed to the product (Fig. 8.1), it is even stored in an on-board non-volatile memory (Sec. 12.3.9), and readable by CAEN toolbox software (Sec.
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Electronic Instrumentation 9 Getting Started with V2495 9.1 Expansion Mezzanines Four different type of mezzanine boards are available by ordering option to extend the V2495 functions (Tab. 1.2). Fig. 9.1: Mezzanine boards for the V2495 9.2 Mezzanine Boards Installation In order to install an A395x-series mezzanine board on the V2495 motherboard, please use a Phillips screwdriver.
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Fig. 9.3: Multi-pin connector pin assignment The CAEN A967 Cable Adapter (Fig. 9.4) allows to adapt each Robinson Nugent multi-pin connector into two 1” 17+17- pin Header-type male connectors (3M, 4634-7301) with locks through two 25 cm long flat cables. Refer to the cable datasheet [RD3] for specifications and to Tab.
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Position 4 = Gate and Delay Demo (see Sec. 14.7) Position 5 = available (empty) Note: All the positions from 6 up to 15 are equivalent to position 0: factory firmware is loaded. UM5175 – V2495 User Manual rev. 5...
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• If the UFPGA Configuration LED is off and the SW5 selector is set to position 0 or the GDG Configuration LED lights up orange, please contact CAEN for further instructions. Refer to Chap. 15 for CAEN Support contacts.
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Note: to ensure the best system performance, it is recommended to have always the latest drivers release installed. 11.1.1 Direct USB Driver In order to communicate with the V2495 through the front panel USB interface (see Chap. 4), the related driver is available for free download at the V2495 Downloads page on CAEN web site (login required).
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CAEN Electronic Instrumentation 4. Right click on “V2495” item and select Update Driver Software option in the slide menu. Fig. 11.2: USB driver manual installation: Step1 5. Select Browse my computer for driver software as in Fig. 11.3. Fig. 11.3: USB driver manual installation: Step2...
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6. Use the [Browse] button to point to the driver folder in the destination path on the host PC. Fig. 11.4: USB driver manual installation: Step3 7. Click the [Close] button at the end of the installation process. Fig. 11.5: USB driver manual installation: Step4 UM5175 – V2495 User Manual rev. 5...
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➢ V3718 USB-2.0 Driver The required driver is available for free download at the V3718 Downloads page on CAEN web site (login required) and manually installed. The installation procedure described for the direct USB driver can be taken as reference.
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Get the Board Info file (useful in case of support requests) Fig. 11.7: CAEN Toolbox Graphical User Interface CAEN Toolbox runs on Windows® and Linux® platforms. The software is stand-alone on both the available versions. Refer to the CAEN Toolbox documentation for installation instructions and a detailed description [RD1].
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Electronic Instrumentation 11.2.2 PLULib Library CAEN PLULib library is a library of C functions developed to control V2495 and DT5495 programmable logic units through direct USB and Ethernet communication interfaces, but also through the VMEbus connection by using CAEN Bridges.
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CAEN Electronic Instrumentation 12 Communication Interfaces The V2495 board can be accessed via both VME bus and USB interface. All registers are accessible from both communication interfaces (VME/USB). 12.1 VME Bus The V2495 boards can be individually addressed on the bus by means of their assigned base address.
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This register contains the 32-bit STATUS/ID set by the module on the VME data bus [31:0] during the Interrupt Acknowledge cycle 12.3.7 Scratch Register Description This register allows to perform 32-bit accesses for test purposes. Default value is [31:0] 0xAAAAAAAA UM5175 – V2495 User Manual rev. 5...
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PID 32 bit (LSB) / PID 16 bit (LSB) /Serial Number (LSB) Tab. 12.3: ROM Address Map of the V2495 Note: The oui0/1 fields represent CAEN Manufacturer identifier (IEEE OUI), which is equal to 0x40E6. Note: The version field identifies the module version (0x00 = V2495).
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Note: access to the FLASH is through the provided functions of the PLULib library (see Sec. 11.2). 12.3.15 Internal Scratch SRAM(0x8C00-0x8FFF) This area is available either for test access or for volatile data storage. Any address in this interval is implemented by an internal RAM location. UM5175 – V2495 User Manual rev. 5...
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A step-by-step guide will be given to run the examples. Their goal is to provide an extensive overview of the main functionalities of the V2495 board and of its mezzanine cards. The code of these demos, together with a firmware template, can be downloaded from the CAEN website.
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The power of Sci-Compiler is to make it possible to program a FPGA without strictly requiring knowledge of FPGA programming languages. Please, find all the information and material about Sci-Compiler, and how to use it with your CAEN Programmable Logic Unit, on the dedicated website: https://www.sci-compiler.com/...
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The second step is possible by moving to 1-2 the relevant jumper on the mezzanine board which relies next to each channel, as in Fig. 13.1. Fig. 13.1: A395 jumpers for the channel impedance selection UM5175 – V2495 User Manual rev. 5...
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<= '0' when ((IDE = A395B_ID_CODE) or (IDE = A395C_ID_CODE) or (IDE = A395E_ID_CODE)) else '1'; f_oe_n_auto <= '0' when ((IDF = A395B_ID_CODE) or (IDF = A395C_ID_CODE) or (IDF = A395E_ID_CODE)) else '1'; UM5175 – V2495 User Manual rev. 5...
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A data prefetch mechanism, implemented in the MFPGA, stores User data into a MFPGA local data queue (prefetch data queue). The MFPGA prefetch queue data is available for readout over the VME or USB interface (see Sec. 12.3). The prefetch mechanism is illustrated by Fig. 13.5. UM5175 – V2495 User Manual rev. 5...
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0x0000 (fixed). The User logic is required to respond only to address 0x0000: data from its data queue are made available to the V2495 local bus. If a new register access is requested to the local bus master while a prefetch cycle is ongoing, the prefetch cycle will be interrupted by asserting the nBLAST signal and the register access will be served with priority.
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Example 3: If the delay value is set to 0xFFF8 (≈ 701 µs), the ma maximum possible gate value is 0x8 (typ. 86.9 ns). PARAMETER VALUE 12 ns (typ.) ± 10% 10.7 ns (typ.) ± 10% Tab. 13.9: Main parameters of the Gate and Delay Generator UM5175 – V2495 User Manual rev. 5...
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The UFPGA can set the relevant configuration registers and read data from the generator through the SPI protocol. CAEN does not provide a detailed description of the communication protocol over the SPI bus for GDG configuration. A VHDL component is provided in the gd_control.vhd source code (GD_CONTROL), included in all the user demo firmware.
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Note that in the case of a broadcast command the delay and gate values are serialized to the GDG at the same time. The bits related to the channel index (six LSBs of the CONTROL register) are irrelevant in this case. UM5175 – V2495 User Manual rev. 5...
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Electronic Instrumentation 13.6 Porting V1495 to V2495 Firmware designs targeted to the V1495 User FPGA can be ported to V2495 by keeping in mind the following differences between the two modules: The V2495 FPGA device is different (Cyclone V versus Cyclone I) and with larger logic resources. While there will be no resource constrains, the FPGA configuration scheme and output binary files are different for the two boards.
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0). To run a firmware “as it is”, it is required to use the functions of the CAEN PLULib library to access the proper (refer to Sec. 11.2). To modify the demos and upload the new firmware on the FPGA, basic knowledge of VHDL language and Altera Quartus II software are required.
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Input value of Port B ➢ C-PORT VALUE register: Contains the 32 output bits of port C (selectable by the user in this demo). Address: 0x100C. Mode: Read only. Description [31:0] Output value of port C UM5175 – V2495 User Manual rev. 5...
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0x7 = the OR of ports A and B (possibly masked) is captured and sent to C when a gate signal is active 0x8 = a clock counter (@ 50 MHz) is sent to C 0x9/0xF = the value of a register is sent to C UM5175 – V2495 User Manual rev. 5...
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➢ C-PORT USER VALUE register: Allows to set the C port value when Control register bits[3:0] are set to 0x9/0xF. Address: 0x180C. Mode: Read and Write. Description [31:0] User value of Port C UM5175 – V2495 User Manual rev. 5...
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Address: 0x1004. Mode: Read only. Description [31:0] Input on port A ➢ B PORT VALUE: the 32 input bits of port B Address: 0x1008. Mode: Read only. Description [31:0] Input on port B UM5175 – V2495 User Manual rev. 5...
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0 = NIM level 1 = TTL level ➢ C PORT VALUE register: allows to set an arbitrary value to port C. Address: 0x180C. Mode: Read and Write. Description [31:0] User output value for port C UM5175 – V2495 User Manual rev. 5...
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The 3 LSBs [18:16] select the channel for either a write or read access. If a write access is performed [19:16] and [19] = 1 all channels are selected for writing; if a read access is performed [19] is ignored [15:0] DAC value UM5175 – V2495 User Manual rev. 5...
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Mode: Read and Write. Description [31:0] DAC value Please, note that the DAC value obtained from register 0x1804 is not read from the chip, but it is the last set value for that specific channel. UM5175 – V2495 User Manual rev. 5...
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1 = G0 input I/O port level selection: 0 = NIM level 1 = TTL level WARNING: When the G0 connector is used as an input, the user should follow the procedure described in Sec. 13.2. UM5175 – V2495 User Manual rev. 5...
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1 = Start of read operation 1 = Start of write operation ➢ DATA READ register: The information from the DFPGA can be read in this register. Address: 0x7F0C. Mode: Read only. Description [31:0] Data UM5175 – V2495 User Manual rev. 5...
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Gate and delay ready signal (when 0, the Gate and Delay controller is busy. A new command to the Gate and Delay controller should not be issued before this bit sets back to 1) UM5175 – V2495 User Manual rev. 5...
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15 FW2495SC Pay Firmware CAEN provides the FW2495SC pay firmware for the DT5495 and V2495 boards. By loading this firmware on the USER FPGA of the board, it can be used as a Multievent latching scaler housing up to 160 independent counting channels (reachable thanks to the channel extension given by the x395 mezzanines).
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CAEN Electronic Instrumentation 16 Software Development Software applications can be developed for the V2495 by using the functions and features provided by the CAEN PLULib library [RD4]. CAEN PLULib library requires the Main FPGA Application Firmware revision 1.4 or higher!
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CAEN Electronic Instrumentation 1 Technical Support To contact CAEN specialists for requests on the software, hardware, and board return and repair, it is necessary a MyCAEN+ account on www.caen.it: https://www.caen.it/support-services/getting-started-with-mycaen-portal/ All the instructions for use the Support platform are in the document: A paper copy of the document is delivered with CAEN boards.
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